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Merge pull request #817 from hjelmn/remove_alpha

opal/asm: remove alpha support
Этот коммит содержится в:
Nathan Hjelm 2015-08-18 13:52:03 -06:00
родитель 1b45712595 551c2ea480
Коммит f87dbca042
10 изменённых файлов: 2 добавлений и 474 удалений

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@ -916,12 +916,6 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
OPAL_GCC_INLINE_ASSIGN='"mov %0=r0\n;;\n" : "=&r"(ret)'
;;
alpha-*|alphaev[[4-8]]-*|alphaev56-*|alphaev6[[78]]-*)
opal_cv_asm_arch="ALPHA"
OPAL_ASM_SUPPORT_64BIT=1
OPAL_GCC_INLINE_ASSIGN='"bis [$]31,[$]31,%0" : "=&r"(ret)'
;;
armv7*)
opal_cv_asm_arch="ARM"
OPAL_ASM_SUPPORT_64BIT=1

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@ -63,7 +63,6 @@ EXTRA_DIST = \
generate-all-asm.pl \
base/aix.conf \
base/default.conf \
base/ALPHA.asm \
base/AMD64.asm \
base/ARM.asm \
base/IA32.asm \

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@ -28,15 +28,6 @@
# Assembly Format field:
# config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack
######################################################################
#
# Alpha
#
######################################################################
ALPHA default-.text-.globl-:--$-@-1-1-1-1-1 alpha-linux
######################################################################
#
# AMD Opteron / Intel EM64T

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@ -1,225 +0,0 @@
.set noreorder
.set volatile
.set noat
.set nomacro
.text
.align 2
.align 4
.globl opal_atomic_mb
.ent opal_atomic_mb
$opal_atomic_mb..ng:
opal_atomic_mb:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
mb
.set nomacro
ret $31,($26),1
.end opal_atomic_mb
.align 2
.align 4
.globl opal_atomic_rmb
.ent opal_atomic_rmb
$opal_atomic_rmb..ng:
opal_atomic_rmb:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
mb
.set nomacro
ret $31,($26),1
.end opal_atomic_rmb
.align 2
.align 4
.globl opal_atomic_wmb
.ent opal_atomic_wmb
$opal_atomic_wmb..ng:
opal_atomic_wmb:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
wmb
.set nomacro
ret $31,($26),1
.end opal_atomic_wmb
.align 2
.align 4
.globl opal_atomic_cmpset_32
.ent opal_atomic_cmpset_32
$opal_atomic_cmpset_32..ng:
opal_atomic_cmpset_32:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
1: ldl_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stl_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
ret $31,($26),1
.end opal_atomic_cmpset_32
.align 2
.align 4
.globl opal_atomic_cmpset_acq_32
.ent opal_atomic_cmpset_acq_32
$opal_atomic_cmpset_acq_32..ng:
opal_atomic_cmpset_acq_32:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
1: ldl_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stl_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
.set macro
mb
.set nomacro
ret $31,($26),1
.end opal_atomic_cmpset_acq_32
.align 2
.align 4
.globl opal_atomic_cmpset_rel_32
.ent opal_atomic_cmpset_rel_32
$opal_atomic_cmpset_rel_32..ng:
opal_atomic_cmpset_rel_32:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
wmb
1: ldl_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stl_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
ret $31,($26),1
.end opal_atomic_cmpset_rel_32
.align 2
.align 4
.globl opal_atomic_cmpset_64
.ent opal_atomic_cmpset_64
$opal_atomic_cmpset_64..ng:
opal_atomic_cmpset_64:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
1: ldq_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stq_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
ret $31,($26),1
.end opal_atomic_cmpset_64
.align 2
.align 4
.globl opal_atomic_cmpset_acq_64
.ent opal_atomic_cmpset_acq_64
$opal_atomic_cmpset_acq_64..ng:
opal_atomic_cmpset_acq_64:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
1: ldq_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stq_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
.set macro
mb
.set nomacro
ret $31,($26),1
.end opal_atomic_cmpset_acq_64
.align 2
.align 4
.globl opal_atomic_cmpset_rel_64
.ent opal_atomic_cmpset_rel_64
$opal_atomic_cmpset_rel_64..ng:
opal_atomic_cmpset_rel_64:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
wmb
1: ldq_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stq_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
addl $31,$0,$0
ret $31,($26),1
.end opal_atomic_cmpset_rel_64
.align 2
.align 4
.globl opal_sys_timer_get_cycles
.ent opal_sys_timer_get_cycles
$opal_sys_timer_get_cycles..ng:
opal_sys_timer_get_cycles:
.eflag 48
.frame $30,0,$26,0
.prologue 0
.set macro
wmb
1: ldq_l $0, 0($16)
cmpeq $0, $17, $0
beq $0, 2f
mov $18, $0
stq_c $0, 0($16)
beq $0, 1b
jmp 3f
2: mov $31, $0
3:
.set nomacro
rpcc $0
ret
.end opal_sys_timer_get_cycles

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@ -27,7 +27,6 @@ headers += \
opal/sys/timer.h \
opal/sys/cma.h
include opal/sys/alpha/Makefile.am
include opal/sys/amd64/Makefile.am
include opal/sys/arm/Makefile.am
include opal/sys/ia32/Makefile.am

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@ -1,21 +0,0 @@
#
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
# University Research and Technology
# Corporation. All rights reserved.
# Copyright (c) 2004-2005 The University of Tennessee and The University
# of Tennessee Research Foundation. All rights
# reserved.
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
# University of Stuttgart. All rights reserved.
# Copyright (c) 2004-2005 The Regents of the University of California.
# All rights reserved.
# $COPYRIGHT$
#
# Additional copyrights may follow
#
# $HEADER$
#
# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
headers += opal/sys/alpha/atomic.h

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@ -1,173 +0,0 @@
/*
* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
* University Research and Technology
* Corporation. All rights reserved.
* Copyright (c) 2004-2005 The University of Tennessee and The University
* of Tennessee Research Foundation. All rights
* reserved.
* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
* University of Stuttgart. All rights reserved.
* Copyright (c) 2004-2005 The Regents of the University of California.
* All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
*
* $HEADER$
*/
#ifndef OPAL_SYS_ARCH_ATOMIC_H
#define OPAL_SYS_ARCH_ATOMIC_H 1
/*
* On alpha, everything is load-locked, store-conditional...
*/
#define MB() __asm__ __volatile__ ("mb");
#define RMB() __asm__ __volatile__ ("mb");
#define WMB() __asm__ __volatile__ ("wmb");
/**********************************************************************
*
* Define constants for PowerPC 32
*
*********************************************************************/
#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
#define OPAL_HAVE_ATOMIC_CMPSET_32 1
#define OPAL_HAVE_ATOMIC_CMPSET_64 1
/**********************************************************************
*
* Memory Barriers
*
*********************************************************************/
#if OPAL_GCC_INLINE_ASSEMBLY
static inline void opal_atomic_mb(void)
{
MB();
}
static inline void opal_atomic_rmb(void)
{
RMB();
}
static inline void opal_atomic_wmb(void)
{
WMB();
}
static inline void opal_atomic_isync(void)
{
}
#endif /* OPAL_GCC_INLINE_ASSEMBLY */
/**********************************************************************
*
* Atomic math operations
*
*********************************************************************/
#if OPAL_GCC_INLINE_ASSEMBLY
static inline int opal_atomic_cmpset_32( volatile int32_t *addr,
int32_t oldval, int32_t newval)
{
int32_t ret;
__asm __volatile__ (
"1: ldl_l %0, %1 \n\t"
"cmpeq %0, %2, %0 \n\t"
"beq %0, 2f \n\t"
"mov %3, %0 \n\t"
"stl_c %0, %1 \n\t"
"beq %0, 1b \n\t"
"jmp 3f \n"
"2: mov $31, %0 \n"
"3: \n"
: "=&r" (ret), "+m" (*addr)
: "r" (oldval), "r" (newval)
: "memory");
return ret;
}
static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
int32_t oldval,
int32_t newval)
{
int rc;
rc = opal_atomic_cmpset_32(addr, oldval, newval);
opal_atomic_rmb();
return rc;
}
static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
int32_t oldval,
int32_t newval)
{
opal_atomic_wmb();
return opal_atomic_cmpset_32(addr, oldval, newval);
}
static inline int opal_atomic_cmpset_64( volatile int64_t *addr,
int64_t oldval, int64_t newval)
{
int32_t ret;
__asm__ __volatile__ (
"1: ldq_l %0, %1 \n\t"
"cmpeq %0, %2, %0 \n\t"
"beq %0, 2f \n\t"
"mov %3, %0 \n\t"
"stq_c %0, %1 \n\t"
"beq %0, 1b \n\t"
"jmp 3f \n"
"2: mov $31, %0 \n"
"3: \n"
: "=&r" (ret), "+m" (*addr)
: "r" (oldval), "r" (newval)
: "memory");
return ret;
}
static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
int64_t oldval,
int64_t newval)
{
int rc;
rc = opal_atomic_cmpset_64(addr, oldval, newval);
opal_atomic_rmb();
return rc;
}
static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
int64_t oldval,
int64_t newval)
{
opal_atomic_wmb();
return opal_atomic_cmpset_64(addr, oldval, newval);
}
#endif /* OPAL_GCC_INLINE_ASSEMBLY */
#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */

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@ -1,35 +0,0 @@
#!/bin/sh
#
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
# University Research and Technology
# Corporation. All rights reserved.
# Copyright (c) 2004-2005 The University of Tennessee and The University
# of Tennessee Research Foundation. All rights
# reserved.
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
# University of Stuttgart. All rights reserved.
# Copyright (c) 2004-2005 The Regents of the University of California.
# All rights reserved.
# $COPYRIGHT$
#
# Additional copyrights may follow
#
# $HEADER$
#
CFILE=/tmp/opal_atomic_$$.c
trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
echo Updating asm.s from atomic.h using gcc
cat > $CFILE<<EOF
#include <stdlib.h>
#include <inttypes.h>
#define static
#define inline
#define OPAL_GCC_INLINE_ASSEMBLY 1
#include "atomic.h"
EOF
gcc -O3 -I. -S $CFILE -o asm.s

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@ -30,7 +30,6 @@
#define OPAL_IA32 0010
#define OPAL_IA64 0020
#define OPAL_AMD64 0030
#define OPAL_ALPHA 0040
#define OPAL_POWERPC32 0050
#define OPAL_POWERPC64 0051
#define OPAL_SPARC 0060

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@ -11,6 +11,8 @@
* All rights reserved.
* Copyright (c) 2007 Sun Microsystems, Inc. All rights reserved.
* Copyright (c) 2011 Sandia National Laboratories. All rights reserved.
* Copyright (c) 2013-2015 Los Alamos National Security, LLC. All rights
* reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
@ -140,8 +142,6 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
#include "opal/sys/sync_builtin/atomic.h"
#elif OPAL_ASSEMBLY_BUILTIN == OPAL_BUILTIN_OSX
#include "opal/sys/osx/atomic.h"
#elif OPAL_ASSEMBLY_ARCH == OPAL_ALPHA
#include "opal/sys/alpha/atomic.h"
#elif OPAL_ASSEMBLY_ARCH == OPAL_AMD64
#include "opal/sys/amd64/atomic.h"
#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM