opal/asm: remove alpha support
This commit removes alpha asm support. No current processor manufacturer makes chips compatible with DEC alpha and no participating organization has alpha processors. This makes it difficult to support alpha via assembly. This doesn't mean Open MPI will no longer build/work on alpha processors. It should continue to work with gcc's builtin sync atomics. Signed-off-by: Nathan Hjelm <hjelmn@lanl.gov>
Этот коммит содержится в:
Nathan Hjelm
родитель
5ef0632f9d
Коммит
551c2ea480
@ -916,12 +916,6 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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OPAL_GCC_INLINE_ASSIGN='"mov %0=r0\n;;\n" : "=&r"(ret)'
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;;
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alpha-*|alphaev[[4-8]]-*|alphaev56-*|alphaev6[[78]]-*)
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opal_cv_asm_arch="ALPHA"
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_GCC_INLINE_ASSIGN='"bis [$]31,[$]31,%0" : "=&r"(ret)'
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;;
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armv7*)
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opal_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=1
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@ -63,7 +63,6 @@ EXTRA_DIST = \
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generate-all-asm.pl \
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base/aix.conf \
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base/default.conf \
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base/ALPHA.asm \
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base/AMD64.asm \
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base/ARM.asm \
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base/IA32.asm \
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@ -28,15 +28,6 @@
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# Assembly Format field:
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# config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack
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######################################################################
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#
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# Alpha
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#
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######################################################################
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ALPHA default-.text-.globl-:--$-@-1-1-1-1-1 alpha-linux
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######################################################################
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#
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# AMD Opteron / Intel EM64T
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@ -1,225 +0,0 @@
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.set noreorder
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.set volatile
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.set noat
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.set nomacro
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.text
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.align 2
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.align 4
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.globl opal_atomic_mb
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.ent opal_atomic_mb
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$opal_atomic_mb..ng:
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opal_atomic_mb:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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mb
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.set nomacro
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ret $31,($26),1
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.end opal_atomic_mb
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.align 2
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.align 4
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.globl opal_atomic_rmb
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.ent opal_atomic_rmb
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$opal_atomic_rmb..ng:
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opal_atomic_rmb:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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mb
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.set nomacro
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ret $31,($26),1
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.end opal_atomic_rmb
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.align 2
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.align 4
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.globl opal_atomic_wmb
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.ent opal_atomic_wmb
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$opal_atomic_wmb..ng:
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opal_atomic_wmb:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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wmb
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.set nomacro
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ret $31,($26),1
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.end opal_atomic_wmb
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.align 2
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.align 4
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.globl opal_atomic_cmpset_32
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.ent opal_atomic_cmpset_32
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$opal_atomic_cmpset_32..ng:
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opal_atomic_cmpset_32:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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1: ldl_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stl_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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ret $31,($26),1
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.end opal_atomic_cmpset_32
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.align 2
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.align 4
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.globl opal_atomic_cmpset_acq_32
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.ent opal_atomic_cmpset_acq_32
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$opal_atomic_cmpset_acq_32..ng:
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opal_atomic_cmpset_acq_32:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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1: ldl_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stl_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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.set macro
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mb
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.set nomacro
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ret $31,($26),1
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.end opal_atomic_cmpset_acq_32
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.align 2
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.align 4
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.globl opal_atomic_cmpset_rel_32
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.ent opal_atomic_cmpset_rel_32
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$opal_atomic_cmpset_rel_32..ng:
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opal_atomic_cmpset_rel_32:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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wmb
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1: ldl_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stl_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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ret $31,($26),1
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.end opal_atomic_cmpset_rel_32
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.align 2
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.align 4
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.globl opal_atomic_cmpset_64
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.ent opal_atomic_cmpset_64
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$opal_atomic_cmpset_64..ng:
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opal_atomic_cmpset_64:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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1: ldq_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stq_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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ret $31,($26),1
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.end opal_atomic_cmpset_64
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.align 2
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.align 4
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.globl opal_atomic_cmpset_acq_64
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.ent opal_atomic_cmpset_acq_64
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$opal_atomic_cmpset_acq_64..ng:
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opal_atomic_cmpset_acq_64:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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1: ldq_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stq_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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.set macro
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mb
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.set nomacro
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ret $31,($26),1
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.end opal_atomic_cmpset_acq_64
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.align 2
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.align 4
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.globl opal_atomic_cmpset_rel_64
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.ent opal_atomic_cmpset_rel_64
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$opal_atomic_cmpset_rel_64..ng:
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opal_atomic_cmpset_rel_64:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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wmb
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1: ldq_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stq_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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addl $31,$0,$0
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ret $31,($26),1
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.end opal_atomic_cmpset_rel_64
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.align 2
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.align 4
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.globl opal_sys_timer_get_cycles
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.ent opal_sys_timer_get_cycles
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$opal_sys_timer_get_cycles..ng:
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opal_sys_timer_get_cycles:
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.eflag 48
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.frame $30,0,$26,0
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.prologue 0
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.set macro
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wmb
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1: ldq_l $0, 0($16)
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cmpeq $0, $17, $0
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beq $0, 2f
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mov $18, $0
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stq_c $0, 0($16)
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beq $0, 1b
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jmp 3f
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2: mov $31, $0
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3:
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.set nomacro
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rpcc $0
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ret
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.end opal_sys_timer_get_cycles
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@ -27,7 +27,6 @@ headers += \
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opal/sys/timer.h \
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opal/sys/cma.h
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include opal/sys/alpha/Makefile.am
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include opal/sys/amd64/Makefile.am
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include opal/sys/arm/Makefile.am
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include opal/sys/ia32/Makefile.am
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@ -1,21 +0,0 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2005 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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#
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# $HEADER$
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#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += opal/sys/alpha/atomic.h
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@ -1,173 +0,0 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OPAL_SYS_ARCH_ATOMIC_H
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#define OPAL_SYS_ARCH_ATOMIC_H 1
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/*
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* On alpha, everything is load-locked, store-conditional...
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*/
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#define MB() __asm__ __volatile__ ("mb");
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#define RMB() __asm__ __volatile__ ("mb");
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#define WMB() __asm__ __volatile__ ("wmb");
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/**********************************************************************
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*
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* Define constants for PowerPC 32
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline void opal_atomic_mb(void)
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{
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MB();
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}
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static inline void opal_atomic_rmb(void)
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{
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RMB();
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}
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static inline void opal_atomic_wmb(void)
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{
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WMB();
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}
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static inline void opal_atomic_isync(void)
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{
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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/**********************************************************************
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*
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* Atomic math operations
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline int opal_atomic_cmpset_32( volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int32_t ret;
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__asm __volatile__ (
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"1: ldl_l %0, %1 \n\t"
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"cmpeq %0, %2, %0 \n\t"
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"beq %0, 2f \n\t"
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"mov %3, %0 \n\t"
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"stl_c %0, %1 \n\t"
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"beq %0, 1b \n\t"
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"jmp 3f \n"
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"2: mov $31, %0 \n"
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"3: \n"
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: "=&r" (ret), "+m" (*addr)
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: "r" (oldval), "r" (newval)
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: "memory");
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return ret;
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}
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static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
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int32_t oldval,
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int32_t newval)
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{
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int rc;
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rc = opal_atomic_cmpset_32(addr, oldval, newval);
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opal_atomic_rmb();
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return rc;
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}
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static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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int32_t oldval,
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int32_t newval)
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{
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opal_atomic_wmb();
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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static inline int opal_atomic_cmpset_64( volatile int64_t *addr,
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int64_t oldval, int64_t newval)
|
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{
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int32_t ret;
|
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|
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__asm__ __volatile__ (
|
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"1: ldq_l %0, %1 \n\t"
|
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"cmpeq %0, %2, %0 \n\t"
|
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"beq %0, 2f \n\t"
|
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"mov %3, %0 \n\t"
|
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"stq_c %0, %1 \n\t"
|
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"beq %0, 1b \n\t"
|
||||
"jmp 3f \n"
|
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"2: mov $31, %0 \n"
|
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"3: \n"
|
||||
: "=&r" (ret), "+m" (*addr)
|
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: "r" (oldval), "r" (newval)
|
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: "memory");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
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static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
|
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int64_t oldval,
|
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int64_t newval)
|
||||
{
|
||||
int rc;
|
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|
||||
rc = opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
opal_atomic_rmb();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
|
||||
int64_t oldval,
|
||||
int64_t newval)
|
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{
|
||||
opal_atomic_wmb();
|
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return opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
}
|
||||
|
||||
|
||||
#endif /* OPAL_GCC_INLINE_ASSEMBLY */
|
||||
|
||||
|
||||
#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */
|
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@ -1,35 +0,0 @@
|
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#!/bin/sh
|
||||
#
|
||||
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
||||
# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
||||
# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
|
||||
#
|
||||
|
||||
CFILE=/tmp/opal_atomic_$$.c
|
||||
|
||||
trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
|
||||
|
||||
echo Updating asm.s from atomic.h using gcc
|
||||
|
||||
cat > $CFILE<<EOF
|
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#include <stdlib.h>
|
||||
#include <inttypes.h>
|
||||
#define static
|
||||
#define inline
|
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#define OPAL_GCC_INLINE_ASSEMBLY 1
|
||||
#include "atomic.h"
|
||||
EOF
|
||||
|
||||
gcc -O3 -I. -S $CFILE -o asm.s
|
||||
@ -30,7 +30,6 @@
|
||||
#define OPAL_IA32 0010
|
||||
#define OPAL_IA64 0020
|
||||
#define OPAL_AMD64 0030
|
||||
#define OPAL_ALPHA 0040
|
||||
#define OPAL_POWERPC32 0050
|
||||
#define OPAL_POWERPC64 0051
|
||||
#define OPAL_SPARC 0060
|
||||
|
||||
@ -11,6 +11,8 @@
|
||||
* All rights reserved.
|
||||
* Copyright (c) 2007 Sun Microsystems, Inc. All rights reserved.
|
||||
* Copyright (c) 2011 Sandia National Laboratories. All rights reserved.
|
||||
* Copyright (c) 2013-2015 Los Alamos National Security, LLC. All rights
|
||||
* reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
||||
* Additional copyrights may follow
|
||||
@ -140,8 +142,6 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
|
||||
#include "opal/sys/sync_builtin/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_BUILTIN == OPAL_BUILTIN_OSX
|
||||
#include "opal/sys/osx/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_ALPHA
|
||||
#include "opal/sys/alpha/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_AMD64
|
||||
#include "opal/sys/amd64/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM
|
||||
|
||||
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