552c9ca5a0
WHAT: Open our low-level communication infrastructure by moving all necessary components (btl/rcache/allocator/mpool) down in OPAL All the components required for inter-process communications are currently deeply integrated in the OMPI layer. Several groups/institutions have express interest in having a more generic communication infrastructure, without all the OMPI layer dependencies. This communication layer should be made available at a different software level, available to all layers in the Open MPI software stack. As an example, our ORTE layer could replace the current OOB and instead use the BTL directly, gaining access to more reactive network interfaces than TCP. Similarly, external software libraries could take advantage of our highly optimized AM (active message) communication layer for their own purpose. UTK with support from Sandia, developped a version of Open MPI where the entire communication infrastucture has been moved down to OPAL (btl/rcache/allocator/mpool). Most of the moved components have been updated to match the new schema, with few exceptions (mainly BTLs where I have no way of compiling/testing them). Thus, the completion of this RFC is tied to being able to completing this move for all BTLs. For this we need help from the rest of the Open MPI community, especially those supporting some of the BTLs. A non-exhaustive list of BTLs that qualify here is: mx, portals4, scif, udapl, ugni, usnic. This commit was SVN r32317.
57 строки
2.2 KiB
C
57 строки
2.2 KiB
C
/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2006-2007 Voltaire. All rights reserved.
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* Copyright (c) 2012 NVIDIA Corporation. All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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/**
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* @file
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*/
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#ifndef MCA_BTL_SMCUDA_ENDPOINT_H
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#define MCA_BTL_SMCUDA_ENDPOINT_H
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/**
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* An abstraction that represents a connection to a endpoint process.
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* An instance of mca_ptl_base_endpoint_t is associated w/ each process
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* and BTL pair at startup.
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*/
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struct mca_btl_base_endpoint_t {
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int my_smp_rank; /**< My SMP process rank. Used for accessing
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* SMP specfic data structures. */
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int peer_smp_rank; /**< My peer's SMP process rank. Used for accessing
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* SMP specfic data structures. */
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#if OPAL_CUDA_SUPPORT
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mca_mpool_base_module_t *mpool; /**< mpool for remotely registered memory */
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#endif /* OPAL_CUDA_SUPPORT */
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#if OPAL_ENABLE_PROGRESS_THREADS == 1
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int fifo_fd; /**< pipe/fifo used to signal endpoint that data is queued */
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#endif
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opal_list_t pending_sends; /**< pending data to send */
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/** lock for concurrent access to endpoint state */
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opal_mutex_t endpoint_lock;
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#if OPAL_CUDA_SUPPORT
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opal_proc_t *proc_opal; /**< Needed for adding CUDA IPC support dynamically */
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enum ipcState ipcstate; /**< CUDA IPC connection status */
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int ipctries; /**< Number of times CUDA IPC connect was sent */
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#endif /* OPAL_CUDA_SUPPORT */
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};
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void btl_smcuda_process_pending_sends(struct mca_btl_base_endpoint_t *ep);
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#endif
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