4d3aa5a8a4
Yes, friends, our favorite PCIE BTL has resurfaced as mgmt vacillates over its existence. This is an updated version that actually mostly works, in its final stages of debugging. Some generalization still remains to be done... This commit was SVN r21358.
150 строки
3.8 KiB
C
150 строки
3.8 KiB
C
/**
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* axon_ioctl - provides an io control interface to the axon driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright (C) IBM Corporation, 2008
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*
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* Authors: H Brett Bolen <hbbolen@us.ibm.com>,
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* Tim Schimke <tschimke@us.ibm.com>,
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* Jesse Arroyo <arroyoj@us.ibm.com>,
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* Murali N Iyer <mniyer@us.ibm.com>
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*
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*/
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#ifndef __AXON_IOCTL_H__
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#define __AXON_IOCTL_H__
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#define AXONIO_IOC_MAGIC 'x'
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/* DMA Memory Registration */
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#define AXONIO_DMA_REGISTER _IOWR(AXONIO_IOC_MAGIC, 0x7, \
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struct AXON_MR_registration)
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#define AXONIO_DMA_DEREGISTER _IOWR(AXONIO_IOC_MAGIC, 0x8, \
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struct AXON_MR_deregistration)
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#define AXONIO_DMA_EXTREGISTER _IOWR(AXONIO_IOC_MAGIC, 0x10, \
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struct AXON_MR_ext_registration)
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#define AXONIO_ISSUE_DMA_FAST _IOWR(AXONIO_IOC_MAGIC, 0x11, __u32)
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/* Wakeup Notificaton of remote system */
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#define AXONIO_NOTIFY _IOR(AXONIO_IOC_MAGIC, 0x13, __u32)
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/*
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* mmap offsets
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*/
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#define LOCAL_SMA_OFFSET 0x0
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#define REMOTE_SMA_OFFSET 0x0100000
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#define DMA_COMMAND_BUFFER_OFFSET 0x0800000
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/*
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* opaque handles
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*/
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typedef __u64 AXON_memory_region_handle;
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/**
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* Supports Memory Registration
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* AXON_DMA_REGISTER
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* AXON_DMA_DEREGISTER
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*
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* permissions bitmask
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*
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* 0x01 - allow local access ( always true)
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* 0x02 - allow local read
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* 0x04 - allow local write
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* 0x10 - allow remote access
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* 0x20 - allow remote read
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* 0x40 - allow remote write
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*/
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enum {
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AXON_MR_LOCAL_ACCESS = 0x00000001,
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AXON_MR_LOCAL_READ = 0x00000002,
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AXON_MR_LOCAL_WRITE = 0x00000004,
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AXON_MR_REMOTE_ACCESS = 0x00000010,
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AXON_MR_REMOTE_READ = 0x00000020,
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AXON_MR_REMOTE_WRITE = 0x00000040,
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};
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struct AXON_MR_registration{
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AXON_memory_region_handle memory_region_handle;
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__u64 local_dma_memory;
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__u64 local_dma_memory_size;
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__u64 permissions;
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};
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struct AXON_MR_deregistration{
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AXON_memory_region_handle memory_region_handle;
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};
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struct AXON_MR_ext_registration{
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AXON_memory_region_handle memory_region_handle;
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__u64 permissions;
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};
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/**
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* Supports DMA GET/PUT status queries
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*
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* NOTE: AXON_dma_request required to be within SMA area
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*/
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struct AXON_dma_list_entry {
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AXON_memory_region_handle src_memory_region_handle;
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__u64 src_address;
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__u64 transfer_size;
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/* total size 0x18 */
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};
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enum {
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AXON_DMATYPE_PUT = 0x01, /* dma local to remote */
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AXON_DMATYPE_GET = 0x02, /* dma remote to local */
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};
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enum {
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AXON_DMAFLAG_WRITE_REMOTE_STATUS = 0x00000001,
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AXON_DMAFLAG_LOCAL_COMPLETION_SIGNAL = 0x00000002,
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};
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struct AXON_dma_request {
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__u32 dma_type;
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__u32 flags;
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__u32 localDmaStatusOffset;
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__u32 remoteDmaStatusOffset;
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__u64 transfer_size; /* bytes */
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__u32 local_descriptor_count;
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__u32 remote_descriptor_count;
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__u64 rsvd1;
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struct AXON_dma_list_entry local_descriptor[10];
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struct AXON_dma_list_entry remote_descriptor[10];
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};
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struct AXON_dma_command_list_fast {
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__u32 dma_requests_available;
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__u32 dma_requests_started;
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__u32 dma_req_offset; /* offset into command block mmap area */
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};
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/**
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* Wakeup Notificaton
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*/
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struct AXON_WAKEUP {
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__u32 type;
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};
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#endif /* __AXON_IOCTL_H__ */
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