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Gleb Natapov c70eb43e43 Align eager RDMA buffer so that last byte of the buffer is on the last byte of
the CPU cache line. Improves zero byte latency a little bit because of L1 cache
miss reduction.

This commit was SVN r11465.
2006-08-28 11:03:56 +00:00
..
2006-08-21 04:05:19 +00:00
2006-08-26 20:14:19 +00:00
2006-08-25 09:45:08 +00:00