215 строки
8.8 KiB
C
215 строки
8.8 KiB
C
/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2008 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2008 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2008 UT-Battelle, LLC. All rights reserved.
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* Copyright (c) 2010 Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2012-2013 NVIDIA Corporation. All rights reserved.
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* Copyright (c) 2015 Los Alamos National Security, LLC. All rights
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* reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#include "ompi_config.h"
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#include "opal/prefetch.h"
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#include "opal/mca/btl/btl.h"
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#include "opal/mca/mpool/mpool.h"
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#include "ompi/constants.h"
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#include "ompi/mca/pml/pml.h"
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#include "pml_ob1.h"
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#include "pml_ob1_hdr.h"
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#include "pml_ob1_rdmafrag.h"
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#include "pml_ob1_recvreq.h"
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#include "pml_ob1_sendreq.h"
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#include "ompi/mca/bml/base/base.h"
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#include "ompi/memchecker.h"
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size_t mca_pml_ob1_rdma_cuda_btls(
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mca_bml_base_endpoint_t* bml_endpoint,
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unsigned char* base,
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size_t size,
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mca_pml_ob1_com_btl_t* rdma_btls);
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int mca_pml_ob1_cuda_need_buffers(void * rreq,
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mca_btl_base_module_t* btl);
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void mca_pml_ob1_cuda_add_ipc_support(struct mca_btl_base_module_t* btl, int32_t flags,
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ompi_proc_t* errproc, char* btlinfo);
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/**
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* Handle the CUDA buffer.
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*/
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int mca_pml_ob1_send_request_start_cuda(mca_pml_ob1_send_request_t* sendreq,
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mca_bml_base_btl_t* bml_btl,
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size_t size) {
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int rc;
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#if OPAL_CUDA_SUPPORT_41
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#if OPAL_CUDA_GDR_SUPPORT
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/* With some BTLs, switch to RNDV from RGET at large messages */
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if ((sendreq->req_send.req_base.req_convertor.flags & CONVERTOR_CUDA) &&
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(sendreq->req_send.req_bytes_packed > (bml_btl->btl->btl_cuda_rdma_limit - sizeof(mca_pml_ob1_hdr_t)))) {
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return mca_pml_ob1_send_request_start_rndv(sendreq, bml_btl, 0, 0);
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}
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#endif /* OPAL_CUDA_GDR_SUPPORT */
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sendreq->req_send.req_base.req_convertor.flags &= ~CONVERTOR_CUDA;
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if (opal_convertor_need_buffers(&sendreq->req_send.req_base.req_convertor) == false) {
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unsigned char *base;
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opal_convertor_get_current_pointer( &sendreq->req_send.req_base.req_convertor, (void**)&base );
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/* Set flag back */
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sendreq->req_send.req_base.req_convertor.flags |= CONVERTOR_CUDA;
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if( 0 != (sendreq->req_rdma_cnt = (uint32_t)mca_pml_ob1_rdma_cuda_btls(
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sendreq->req_endpoint,
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base,
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sendreq->req_send.req_bytes_packed,
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sendreq->req_rdma))) {
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rc = mca_pml_ob1_send_request_start_rdma(sendreq, bml_btl,
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sendreq->req_send.req_bytes_packed);
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if( OPAL_UNLIKELY(OMPI_SUCCESS != rc) ) {
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mca_pml_ob1_free_rdma_resources(sendreq);
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}
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} else {
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if (bml_btl->btl_flags & MCA_BTL_FLAGS_CUDA_PUT) {
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rc = mca_pml_ob1_send_request_start_rndv(sendreq, bml_btl, size,
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MCA_PML_OB1_HDR_FLAGS_CONTIG);
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} else {
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rc = mca_pml_ob1_send_request_start_rndv(sendreq, bml_btl, 0, 0);
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}
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}
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} else {
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/* Do not send anything with first rendezvous message as copying GPU
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* memory into RNDV message is expensive. */
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sendreq->req_send.req_base.req_convertor.flags |= CONVERTOR_CUDA;
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rc = mca_pml_ob1_send_request_start_rndv(sendreq, bml_btl, 0, 0);
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}
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#else
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/* Just do the rendezvous but set initial data to be sent to zero */
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rc = mca_pml_ob1_send_request_start_rndv(sendreq, bml_btl, 0, 0);
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#endif /* OPAL_CUDA_SUPPORT_41 */
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return rc;
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}
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size_t mca_pml_ob1_rdma_cuda_btls(
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mca_bml_base_endpoint_t* bml_endpoint,
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unsigned char* base,
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size_t size,
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mca_pml_ob1_com_btl_t* rdma_btls)
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{
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int num_btls = mca_bml_base_btl_array_get_size(&bml_endpoint->btl_send);
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double weight_total = 0;
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int num_btls_used = 0, n;
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/* shortcut when there are no rdma capable btls */
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if(num_btls == 0) {
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return 0;
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}
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/* check to see if memory is registered */
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for(n = 0; n < num_btls && num_btls_used < mca_pml_ob1.max_rdma_per_request;
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n++) {
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mca_bml_base_btl_t* bml_btl =
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mca_bml_base_btl_array_get_index(&bml_endpoint->btl_send, n);
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if (bml_btl->btl_flags & MCA_BTL_FLAGS_CUDA_GET) {
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mca_btl_base_registration_handle_t *handle = NULL;
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if( NULL != bml_btl->btl->btl_register_mem ) {
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/* register the memory */
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handle = bml_btl->btl->btl_register_mem (bml_btl->btl, bml_btl->btl_endpoint,
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base, size, MCA_BTL_REG_FLAG_CUDA_GPU_MEM |
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MCA_BTL_REG_FLAG_REMOTE_READ);
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}
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if(NULL == handle)
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continue;
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rdma_btls[num_btls_used].bml_btl = bml_btl;
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rdma_btls[num_btls_used].btl_reg = handle;
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weight_total += bml_btl->btl_weight;
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num_btls_used++;
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}
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}
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/* if we don't use leave_pinned and all BTLs that already have this memory
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* registered amount to less then half of available bandwidth - fall back to
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* pipeline protocol */
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if(0 == num_btls_used || (!mca_pml_ob1.leave_pinned && weight_total < 0.5))
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return 0;
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mca_pml_ob1_calc_weighted_length(rdma_btls, num_btls_used, size,
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weight_total);
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return num_btls_used;
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}
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int mca_pml_ob1_cuda_need_buffers(void * rreq,
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mca_btl_base_module_t* btl)
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{
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mca_pml_ob1_recv_request_t* recvreq = (mca_pml_ob1_recv_request_t*)rreq;
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mca_bml_base_endpoint_t* bml_endpoint =
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(mca_bml_base_endpoint_t*)recvreq->req_recv.req_base.req_proc->proc_endpoints[OMPI_PROC_ENDPOINT_TAG_BML];
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mca_bml_base_btl_t *bml_btl = mca_bml_base_btl_array_find(&bml_endpoint->btl_send, btl);
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if ((recvreq->req_recv.req_base.req_convertor.flags & CONVERTOR_CUDA) &&
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(bml_btl->btl_flags & MCA_BTL_FLAGS_CUDA_GET)) {
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recvreq->req_recv.req_base.req_convertor.flags &= ~CONVERTOR_CUDA;
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if(opal_convertor_need_buffers(&recvreq->req_recv.req_base.req_convertor) == true) {
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recvreq->req_recv.req_base.req_convertor.flags |= CONVERTOR_CUDA;
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return true;
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} else {
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recvreq->req_recv.req_base.req_convertor.flags |= CONVERTOR_CUDA;
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return false;
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}
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}
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return true;
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}
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/*
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* This function enables us to start using RDMA get protocol with GPU buffers.
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* We do this by adjusting the flags in the BML structure. This is not the
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* best thing, but this may go away if CUDA IPC is supported everywhere in the
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* future. */
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void mca_pml_ob1_cuda_add_ipc_support(struct mca_btl_base_module_t* btl, int32_t flags,
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ompi_proc_t* errproc, char* btlinfo)
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{
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mca_bml_base_endpoint_t* ep;
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int btl_verbose_stream = 0;
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int i;
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assert(NULL != errproc);
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assert(NULL != errproc->proc_endpoints[OMPI_PROC_ENDPOINT_TAG_BML]);
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if (NULL != btlinfo) {
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btl_verbose_stream = *(int *)btlinfo;
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}
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ep = (mca_bml_base_endpoint_t*)errproc->proc_endpoints[OMPI_PROC_ENDPOINT_TAG_BML];
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/* Find the corresponding bml and adjust the flag to support CUDA get */
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for( i = 0; i < (int)ep->btl_send.arr_size; i++ ) {
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if( ep->btl_send.bml_btls[i].btl == btl ) {
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ep->btl_send.bml_btls[i].btl_flags |= MCA_BTL_FLAGS_CUDA_GET;
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opal_output_verbose(5, btl_verbose_stream,
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"BTL %s: rank=%d enabling CUDA IPC "
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"to rank=%d on node=%s \n",
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btl->btl_component->btl_version.mca_component_name,
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OMPI_PROC_MY_NAME->vpid,
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((ompi_process_name_t*)&errproc->super.proc_name)->vpid,
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errproc->super.proc_hostname);
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}
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}
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}
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