181 строка
4.7 KiB
C
181 строка
4.7 KiB
C
/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OMPI_SYS_ARCH_ATOMIC_H
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#define OMPI_SYS_ARCH_ATOMIC_H 1
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/*
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* On alpha, everything is load-locked, store-conditional...
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*/
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#if OMPI_WANT_SMP_LOCKS
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#define MB() __asm__ __volatile__ ("mb");
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#define RMB() __asm__ __volatile__ ("mb");
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#define WMB() __asm__ __volatile__ ("wmb");
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#else
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#define MB()
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#define RMB()
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#define WMB()
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#endif
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/**********************************************************************
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*
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* Define constants for PowerPC 32
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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#if OMPI_GCC_INLINE_ASSEMBLY
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static inline void opal_atomic_mb(void)
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{
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MB();
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}
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static inline void opal_atomic_rmb(void)
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{
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RMB();
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}
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static inline void opal_atomic_wmb(void)
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{
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WMB();
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}
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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/**********************************************************************
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*
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* Atomic math operations
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*
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*********************************************************************/
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#if OMPI_GCC_INLINE_ASSEMBLY
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static inline int opal_atomic_cmpset_32( volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int32_t ret;
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__asm __volatile__ (
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"1: ldl_l %0, %1 // load oldval value \n\
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cmpeq %0, %2, %0 // compare \n\
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beq %0, 2f // exit if not equal \n\
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mov %3, %0 // value to store \n\
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stl_c %0, %1 // attempt to store \n\
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beq %0, 3f // if failed, try again \n\
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2: // done \n\
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3: br 1b // try again \n\
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.previous \n"
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: "=&r" (ret), "+m" (*addr)
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: "r" (oldval), "r" (newval)
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: "memory");
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return ret;
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}
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static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
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int32_t oldval,
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int32_t newval)
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{
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int rc;
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rc = opal_atomic_cmpset_32(addr, oldval, newval);
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opal_atomic_rmb();
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return rc;
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}
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static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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int32_t oldval,
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int32_t newval)
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{
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opal_atomic_wmb();
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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static inline int opal_atomic_cmpset_64( volatile int64_t *addr,
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int64_t oldval, int64_t newval)
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{
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int32_t ret;
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__asm__ __volatile__ (
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"1: ldq_l %0, %1 // load oldval value \n\
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cmpeq %0, %2, %0 // compare \n\
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beq %0, 2f // exit if not equal \n\
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mov %3, %0 // value to store \n\
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stq_c %0, %1 // attempt to store \n\
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beq %0, 3f // if failed, try again \n\
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2: // done \n\
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3: br 1b // try again \n\
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.previous \n"
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: "=&r" (ret), "+m" (*addr)
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: "r" (oldval), "r" (newval)
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: "memory");
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return ret;
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}
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static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
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int64_t oldval,
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int64_t newval)
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{
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int rc;
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rc = opal_atomic_cmpset_64(addr, oldval, newval);
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opal_atomic_rmb();
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return rc;
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}
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static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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int64_t oldval,
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int64_t newval)
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{
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opal_atomic_wmb();
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return opal_atomic_cmpset_64(addr, oldval, newval);
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}
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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#endif /* ! OMPI_SYS_ARCH_ATOMIC_H */
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