20b81ff634
This commit was SVN r20734.
573 строки
17 KiB
C
573 строки
17 KiB
C
/*
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* Copyright (c) 2007 Los Alamos National Security, LLC.
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* All righs reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#include "ompi_config.h"
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#include <string.h>
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#include <sched.h>
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#include "opal/types.h"
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#include "opal/util/output.h"
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#include "opal/util/if.h"
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#include "opal/sys/atomic.h"
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#include "opal/mca/paffinity/paffinity.h"
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#include "ompi/datatype/convertor.h"
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#include "ompi/mca/btl/btl.h"
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#include "ompi/mca/btl/base/btl_base_error.h"
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#include "ompi/mca/mpool/mpool.h"
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#include "ompi/mca/mpool/base/base.h"
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#include "ompi/mca/pml/pml.h"
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#include "btl_pcie.h"
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#include "btl_pcie_frag.h"
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#include "btl_pcie_proc.h"
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#include "btl_pcie_endpoint.h"
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mca_btl_pcie_module_t mca_btl_pcie_module = {
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{
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&mca_btl_pcie_component.super,
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0, /* max size of first fragment */
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0, /* Threshold below which BTL should not fragment */
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0, /* max send fragment size */
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0, /* pipeline protocol length */
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0, /* max rdma fragment size */
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0, /* min packet size for pipeline protocol */
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0, /* exclusivity */
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0, /* latency */
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0, /* bandwidth */
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0, /* flags */
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mca_btl_pcie_add_procs,
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mca_btl_pcie_del_procs,
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mca_btl_pcie_register,
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mca_btl_pcie_finalize,
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mca_btl_pcie_alloc,
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mca_btl_pcie_free,
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mca_btl_pcie_prepare_src,
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mca_btl_pcie_prepare_dst,
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mca_btl_pcie_send,
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NULL,
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mca_btl_pcie_put, /* put */
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NULL, /* get */
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NULL, /*dump */
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NULL, /* mpool */
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NULL, /* register error cb */
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NULL /* ft event */
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}
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};
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/**
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*
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*/
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int mca_btl_pcie_add_procs(
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struct mca_btl_base_module_t* btl,
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size_t nprocs,
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struct ompi_proc_t **ompi_procs,
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struct mca_btl_base_endpoint_t** peers,
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opal_bitmap_t* reachable)
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{
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*)btl;
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int i;
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for(i = 0; i < (int) nprocs; i++) {
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struct ompi_proc_t* ompi_proc = ompi_procs[i];
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mca_btl_pcie_proc_t* pcie_proc;
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int rc;
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/* Don't connect to anyone on our local node, including
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ourselves. The PCIe doesn't work that way, and the mapper
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sometimes gets confused by that fact. */
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if (OPAL_PROC_ON_LOCAL_NODE(ompi_proc->proc_flags)) continue;
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rc = mca_btl_pcie_proc_create(ompi_proc, pcie_btl, &pcie_proc);
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if(OMPI_SUCCESS != rc) {
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return rc;
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} else if (pcie_proc) {
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opal_bitmap_set_bit(reachable, i);
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peers[i] = pcie_proc->endpoint_proc;
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}
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}
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return OMPI_SUCCESS;
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}
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int mca_btl_pcie_del_procs(struct mca_btl_base_module_t* btl,
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size_t nprocs,
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struct ompi_proc_t **procs,
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struct mca_btl_base_endpoint_t ** peers)
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{
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/* TODO */
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return OMPI_SUCCESS;
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}
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/**
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* Register callback function to support send/recv semantics
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*/
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int mca_btl_pcie_register(
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struct mca_btl_base_module_t* btl,
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mca_btl_base_tag_t tag,
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mca_btl_base_module_recv_cb_fn_t cbfunc,
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void* cbdata)
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{
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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pcie_btl->pcie_reg[tag].cbfunc = cbfunc;
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pcie_btl->pcie_reg[tag].cbdata = cbdata;
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return OMPI_SUCCESS;
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}
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/**
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* Allocate a segment.
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*
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* @param btl (IN) BTL module
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* @param size (IN) Request segment size.
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*/
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mca_btl_base_descriptor_t* mca_btl_pcie_alloc(
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struct mca_btl_base_module_t* btl,
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struct mca_btl_base_endpoint_t* endpoint,
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uint8_t order,
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size_t size,
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uint32_t flags)
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{
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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mca_btl_pcie_frag_t* frag = NULL;
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int rc;
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if (size <= btl->btl_eager_limit) {
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MCA_BTL_PCIE_FRAG_ALLOC_EAGER(pcie_btl, frag, rc);
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if (frag) {
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frag->segment.seg_len = size;
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frag->base.des_flags = 0;
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frag->hdr->length = size;
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}
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}
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if (NULL == frag && size <= btl->btl_max_send_size) {
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MCA_BTL_PCIE_FRAG_ALLOC_MAX(pcie_btl, frag, rc);
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if (frag) {
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frag->segment.seg_len = size;
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frag->base.des_flags = 0;
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frag->hdr->length = size;
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}
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}
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BTL_VERBOSE(("btl_pcie_alloc called for %d bytes, returning 0x%lx", size, frag));
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return (mca_btl_base_descriptor_t*) frag;
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}
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/**
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* Return a segment
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*/
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int mca_btl_pcie_free(
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struct mca_btl_base_module_t* btl,
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mca_btl_base_descriptor_t* des)
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{
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mca_btl_pcie_frag_t* frag = (mca_btl_pcie_frag_t*)des;
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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int ret;
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BTL_VERBOSE(("btl_pcie_free returning 0x%lx", frag));
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if (frag->registration != NULL) {
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pcie_btl->rdma_mpool->mpool_deregister(pcie_btl->rdma_mpool,
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(mca_mpool_base_registration_t*)
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frag->registration);
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frag->registration = NULL;
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}
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MCA_BTL_PCIE_FRAG_RETURN(pcie_btl, frag, ret);
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return ret;
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}
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/**
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* Pack data and return a descriptor that can be
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* used for send/put.
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*
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* @param btl (IN) BTL module
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* @param peer (IN) BTL peer addressing
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*/
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mca_btl_base_descriptor_t* mca_btl_pcie_prepare_src(
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struct mca_btl_base_module_t* btl,
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struct mca_btl_base_endpoint_t* endpoint,
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struct mca_mpool_base_registration_t* registration,
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struct ompi_convertor_t* convertor,
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uint8_t order,
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size_t reserve,
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size_t* size,
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uint32_t flags
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)
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{
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mca_btl_pcie_frag_t* frag = NULL;
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mca_btl_pcie_reg_t* pcie_reg;
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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struct iovec iov;
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uint32_t iov_count = 1;
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size_t max_data = *size;
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int rc;
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BTL_VERBOSE(("btl_pcie_prepare_src called with reserve %d", reserve));
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/* check and see if the data is contiguous */
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if(ompi_convertor_need_buffers(convertor) == false && 0 == reserve) {
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MCA_BTL_PCIE_FRAG_ALLOC_DMA(btl, frag, rc);
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if(NULL == frag) {
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return NULL;
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}
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iov.iov_len = max_data;
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iov.iov_base = NULL;
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/* get the user buffer's address */
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ompi_convertor_pack(convertor, &iov, &iov_count, &max_data);
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*size = max_data;
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if(NULL == registration) {
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rc = pcie_btl->rdma_mpool->mpool_register(pcie_btl->rdma_mpool,
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iov.iov_base, max_data, 0, ®istration);
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if(OMPI_SUCCESS != rc || NULL == registration){
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MCA_BTL_PCIE_FRAG_RETURN(pcie_btl, frag, rc);
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return NULL;
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}
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frag->registration = (mca_btl_pcie_reg_t*) registration;
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}
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pcie_reg = (mca_btl_pcie_reg_t*) registration;
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frag->base.des_flags = 0;
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frag->base.des_src = &frag->segment;
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frag->base.des_src_cnt = 1;
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frag->base.des_dst = NULL;
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frag->base.des_dst_cnt = 0;
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frag->base.des_flags = 0;
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frag->segment.seg_len = max_data;
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frag->segment.seg_addr.pval = iov.iov_base;
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frag->segment.seg_key.key64 = (uint64_t)pcie_reg->handle;
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BTL_VERBOSE(("prepare_src: frag->segment.seg_len = %lu .seg_addr.pval= %llu "
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"frag->segment.seg_key.key64 = %llu",
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frag->segment.seg_len, frag->segment.seg_addr.pval,
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frag->segment.seg_key.key64));
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return &frag->base;
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} else {
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/*
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* if we aren't pinning the data and the requested size is less
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* than the eager limit pack into a fragment from the eager pool
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*/
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if (max_data+reserve <= btl->btl_eager_limit) {
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MCA_BTL_PCIE_FRAG_ALLOC_EAGER(btl, frag, rc);
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if(NULL == frag) {
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return NULL;
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}
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iov.iov_len = max_data;
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iov.iov_base = (unsigned char*) frag->segment.seg_addr.pval + reserve;
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rc = ompi_convertor_pack(convertor, &iov, &iov_count, &max_data );
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*size = max_data;
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if( rc < 0 ) {
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MCA_BTL_PCIE_FRAG_RETURN(btl, frag, rc);
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return NULL;
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}
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frag->segment.seg_len = max_data + reserve;
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}
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/*
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* otherwise pack as much data as we can into a fragment
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* that is the max send size.
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*/
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else {
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MCA_BTL_PCIE_FRAG_ALLOC_MAX(btl, frag, rc);
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if(NULL == frag) {
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return NULL;
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}
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if(max_data + reserve > frag->size){
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max_data = frag->size - reserve;
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}
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iov.iov_len = max_data;
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iov.iov_base = (unsigned char*) frag->segment.seg_addr.pval + reserve;
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rc = ompi_convertor_pack(convertor, &iov, &iov_count, &max_data );
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*size = max_data;
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if( rc < 0 ) {
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MCA_BTL_PCIE_FRAG_RETURN(btl, frag, rc);
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return NULL;
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}
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frag->segment.seg_len = max_data + reserve;
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}
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frag->hdr->length = *size + reserve;
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frag->base.des_src = &frag->segment;
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frag->base.des_src_cnt = 1;
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frag->base.des_dst = NULL;
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frag->base.des_dst_cnt = 0;
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frag->base.des_flags = 0;
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return &frag->base;
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}
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}
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/**
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* Prepare a descriptor for send/rdma using the supplied
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* convertor. If the convertor references data that is contigous,
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* the descriptor may simply point to the user buffer. Otherwise,
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* this routine is responsible for allocating buffer space and
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* packing if required.
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*
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* @param btl (IN) BTL module
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* @param endpoint (IN) BTL peer addressing
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* @param convertor (IN) Data type convertor
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* @param reserve (IN) Additional bytes requested by upper layer to precede user data
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* @param size (IN/OUT) Number of bytes to prepare (IN), number of bytes actually prepared (OUT)
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*/
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mca_btl_base_descriptor_t* mca_btl_pcie_prepare_dst(
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struct mca_btl_base_module_t* btl,
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struct mca_btl_base_endpoint_t* endpoint,
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struct mca_mpool_base_registration_t* registration,
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struct ompi_convertor_t* convertor,
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uint8_t order,
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size_t reserve,
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size_t* size,
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uint32_t flags)
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{
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mca_btl_pcie_frag_t* frag;
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mca_btl_pcie_reg_t* pcie_reg;
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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int rc;
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ptrdiff_t lb;
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MCA_BTL_PCIE_FRAG_ALLOC_DMA(pcie_btl, frag, rc);
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if(NULL == frag) {
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return NULL;
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}
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ompi_ddt_type_lb(convertor->pDesc, &lb);
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frag->segment.seg_addr.pval = convertor->pBaseBuf + lb +
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convertor->bConverted;
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if(NULL == registration) {
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rc = pcie_btl->rdma_mpool->mpool_register(pcie_btl->rdma_mpool,
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frag->segment.seg_addr.pval, *size, 0,
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®istration);
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if(OMPI_SUCCESS != rc || NULL == registration) {
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MCA_BTL_PCIE_FRAG_RETURN(pcie_btl, frag, rc);
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return NULL;
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}
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frag->registration = (mca_btl_pcie_reg_t*) registration;
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}
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pcie_reg = (mca_btl_pcie_reg_t*)registration;
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frag->segment.seg_len = *size;
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frag->segment.seg_key.key64 = (uint64_t) pcie_reg->handle;
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frag->base.des_dst = &frag->segment;
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frag->base.des_dst_cnt = 1;
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frag->base.des_src = NULL;
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frag->base.des_src_cnt = 0;
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frag->base.des_flags = 0;
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BTL_VERBOSE(("prepare_dst: frag->segment.seg_len = %lu .seg_addr.pval= %llu "
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"frag->segment.seg_key.key64 = %llu",
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frag->segment.seg_len, frag->segment.seg_addr.pval,
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frag->segment.seg_key.key64));
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return &frag->base;
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}
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/**
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* Initiate an asynchronous send.
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*
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* @param btl (IN) BTL module
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* @param endpoint (IN) BTL addressing information
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* @param descriptor (IN) Description of the data to be transfered
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* @param tag (IN) The tag value used to notify the peer.
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*/
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int mca_btl_pcie_send(
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struct mca_btl_base_module_t* btl,
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struct mca_btl_base_endpoint_t* endpoint,
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struct mca_btl_base_descriptor_t* descriptor,
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mca_btl_base_tag_t tag)
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{
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/* mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl; */
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mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
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mca_btl_pcie_frag_t* frag = (mca_btl_pcie_frag_t*)descriptor;
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mca_btl_pcie_sma_buf_t *buf = NULL;
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int rc;
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btl_pcie_fifo_entry_t idx;
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/* setup these fields so they get pulled over in the memcpy */
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frag->hdr->tag = tag;
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frag->hdr->length = frag->segment.seg_len;
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if (frag->type == MCA_BTL_PCIE_TYPE_EAGER) {
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MCA_BTL_PCIE_SMA_BUF_ALLOC_EAGER(pcie_btl, buf, rc);
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} else {
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MCA_BTL_PCIE_SMA_BUF_ALLOC_MAX(pcie_btl, buf, rc);
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}
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if (NULL == frag) {
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BTL_ERROR(("can't alloc buf for frag of type %d", frag->type));
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return OMPI_ERR_OUT_OF_RESOURCE;
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}
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frag->endpoint = endpoint;
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frag->sma_buf = buf;
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/* Put fragment into network byte order before copy to save work
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done in sma region */
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OMPI_BTL_PCIE_HEADER_HTON(*frag->hdr);
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/* BWB - FIX ME - both pointers are 16 byte aligned and the
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buffers behind them are a multiple of 16 in length (but
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frag->segment.seg_len might not be). There might be a more
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optimized memcpy option given that behavior. */
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memcpy(buf->pcie_data.pval, frag->hdr,
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sizeof(mca_btl_pcie_header_t) +
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frag->segment.seg_len);
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/* send the fragment pointer to the receiver,
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who will later ACK it back so that we can return it */
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idx = ((char*) buf->pcie_data.pval) - ((char*) endpoint->rem_frag_base);
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idx |= BTL_PCIE_FIFO_TYPE_SEND;
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/* make sure the top bit is zero */
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assert((idx & BTL_PCIE_FIFO_TYPE_MASK) == BTL_PCIE_FIFO_TYPE_SEND);
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/* need to barrier prior to writing remote completion */
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opal_atomic_wmb();
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BTL_VERBOSE(("sent frag 0x%lx (offset %lx), tag %d, length %d, rc = %d",
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frag, idx, frag->hdr->tag, frag->segment.seg_len, rc));
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idx = opal_swap_bytes8(idx);
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rc = ompi_btl_pcie_fifo_set_msg(&endpoint->send_fifo, idx);
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if(OMPI_SUCCESS != rc) {
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if(OMPI_ERR_RESOURCE_BUSY == rc) {
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/* BWB - FIX ME - queue for later */
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abort();
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} else {
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return rc;
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}
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}
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|
|
return OMPI_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* Initiate an asynchronous put.
|
|
*
|
|
* @param btl (IN) BTL module
|
|
* @param endpoint (IN) BTL addressing information
|
|
* @param descriptor (IN) Description of the data to be transferred
|
|
*/
|
|
|
|
int mca_btl_pcie_put(
|
|
mca_btl_base_module_t* btl,
|
|
mca_btl_base_endpoint_t* endpoint,
|
|
mca_btl_base_descriptor_t* descriptor)
|
|
{
|
|
|
|
mca_btl_pcie_frag_t* frag = (mca_btl_pcie_frag_t*) descriptor;
|
|
struct AXON_dma_request dma_req;
|
|
int dma_reqs_started;
|
|
int rc;
|
|
volatile uint64_t *dma_status_addr;
|
|
uint64_t dma_status;
|
|
|
|
frag->endpoint = endpoint;
|
|
|
|
memset(&dma_req,0x00,sizeof(dma_req));
|
|
dma_req.dma_type = AXON_DMATYPE_PUT;
|
|
|
|
dma_req.local_descriptor[0].src_address = frag->base.des_src->seg_addr.lval;
|
|
dma_req.local_descriptor[0].src_memory_region_handle = frag->base.des_src->seg_key.key64;
|
|
|
|
dma_req.remote_descriptor[0].src_address =
|
|
opal_swap_bytes8(frag->base.des_dst->seg_addr.lval);
|
|
dma_req.remote_descriptor[0].src_memory_region_handle =
|
|
opal_swap_bytes8(frag->base.des_dst->seg_key.key64);
|
|
|
|
dma_req.transfer_size =
|
|
dma_req.remote_descriptor[0].transfer_size =
|
|
dma_req.local_descriptor[0].transfer_size = frag->base.des_src->seg_len;
|
|
|
|
dma_req.localDmaStatusOffset = endpoint->lcl_dma_status - (char*) endpoint->lcl_sma_ptr;
|
|
dma_req.remoteDmaStatusOffset = 0;
|
|
|
|
dma_req.local_descriptor_count = 1;
|
|
dma_req.remote_descriptor_count = 1;
|
|
|
|
dma_status_addr = (uint64_t*) endpoint->lcl_dma_status;
|
|
*dma_status_addr = 0;
|
|
|
|
rc = dd_dma_request(&endpoint->pcie_adapter,
|
|
&dma_req,
|
|
1,
|
|
&dma_reqs_started);
|
|
|
|
if (0 != rc) abort();
|
|
|
|
/* wait for completion, for now anyway */
|
|
while (0 == (dma_status = *dma_status_addr)) {
|
|
/* sched_yield(); */
|
|
}
|
|
|
|
frag->base.des_cbfunc(btl, endpoint, &(frag->base), OMPI_SUCCESS);
|
|
|
|
return OMPI_SUCCESS;
|
|
}
|
|
|
|
|
|
/**
|
|
* Initiate an asynchronous get.
|
|
*
|
|
* @param btl (IN) BTL module
|
|
* @param endpoint (IN) BTL addressing information
|
|
* @param descriptor (IN) Description of the data to be transferred
|
|
*
|
|
*/
|
|
|
|
int mca_btl_pcie_get(
|
|
mca_btl_base_module_t* btl,
|
|
mca_btl_base_endpoint_t* endpoint,
|
|
mca_btl_base_descriptor_t* descriptor)
|
|
{
|
|
return OMPI_ERR_NOT_IMPLEMENTED;
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
* Cleanup/release module resources.
|
|
*/
|
|
|
|
int mca_btl_pcie_finalize(struct mca_btl_base_module_t* btl)
|
|
{
|
|
mca_btl_pcie_module_t* pcie_btl = (mca_btl_pcie_module_t*) btl;
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_lock);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_sma_buf_eager);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_sma_buf_max);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_frag_eager);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_frag_max);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_frag_dma);
|
|
OBJ_DESTRUCT(&pcie_btl->pcie_recv_frag);
|
|
return OMPI_SUCCESS;
|
|
}
|