7e079d20ab
improperly and badness ensues.. This commit was SVN r10574.
609 строки
22 KiB
C
609 строки
22 KiB
C
/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2006 Sandia National Laboratories. All rights
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* reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#include "ompi_config.h"
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#include "ompi/constants.h"
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#include "opal/prefetch.h"
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#include "opal/event/event.h"
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#include "opal/util/if.h"
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#include "opal/util/argv.h"
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#include "opal/util/output.h"
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#include "ompi/mca/pml/pml.h"
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#include "ompi/mca/btl/btl.h"
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#include "opal/sys/timer.h"
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#include "opal/mca/base/mca_base_param.h"
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#include "orte/mca/errmgr/errmgr.h"
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#include "ompi/mca/mpool/base/base.h"
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#include "btl_ud.h"
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#include "btl_ud_frag.h"
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#include "btl_ud_endpoint.h"
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#include "ompi/mca/btl/base/base.h"
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#include "ompi/datatype/convertor.h"
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#include "ompi/mca/mpool/mpool.h"
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#include <sysfs/libsysfs.h>
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#include <infiniband/verbs.h>
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#include <errno.h>
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#include <string.h> /* for strerror()*/
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#include "ompi/mca/pml/base/pml_base_module_exchange.h"
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mca_btl_ud_component_t mca_btl_ud_component = {
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{
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/* First, the mca_base_component_t struct containing meta information
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about the component itself */
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{
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/* Indicate that we are a pml v1.0.0 component (which also implies a
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specific MCA version) */
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MCA_BTL_BASE_VERSION_1_0_0,
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"ud", /* MCA component name */
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OMPI_MAJOR_VERSION, /* MCA component major version */
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OMPI_MINOR_VERSION, /* MCA component minor version */
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OMPI_RELEASE_VERSION, /* MCA component release version */
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mca_btl_ud_component_open, /* component open */
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mca_btl_ud_component_close /* component close */
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},
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/* Next the MCA v1.0.0 component meta data */
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{
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/* Whether the component is checkpointable or not */
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false
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},
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mca_btl_ud_component_init,
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mca_btl_ud_component_progress,
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}
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};
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/*
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* Profiling information
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*/
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#if MCA_BTL_UD_ENABLE_PROFILE
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mca_btl_ud_profile_t mca_btl_ud_profile = {0};
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#endif
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/*
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* utility routines for parameter registration
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*/
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static inline void mca_btl_ud_param_register_string(
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const char* param_name,
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const char* param_desc,
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const char* default_value,
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char** out_value)
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{
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mca_base_param_reg_string(&mca_btl_ud_component.super.btl_version,
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param_name,
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param_desc,
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false,
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false,
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default_value,
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out_value);
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}
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static inline void mca_btl_ud_param_register_int(
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const char* param_name,
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const char* param_desc,
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int default_value,
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int* out_value)
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{
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mca_base_param_reg_int(&mca_btl_ud_component.super.btl_version,
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param_name,
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param_desc,
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false,
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false,
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default_value,
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out_value);
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}
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/*
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* Called by MCA framework to open the component, registers
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* component parameters.
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*/
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int mca_btl_ud_component_open(void)
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{
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int val;
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/* initialize state */
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mca_btl_ud_component.ib_num_btls=0;
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mca_btl_ud_component.ud_btls=NULL;
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/* initialize objects */
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OBJ_CONSTRUCT(&mca_btl_ud_component.ib_procs, opal_list_t);
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/* register IB component parameters */
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mca_btl_ud_param_register_int ("max_btls", "maximum number of HCAs/ports to use",
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4, (int*)&mca_btl_ud_component.ib_max_btls);
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mca_btl_ud_param_register_int ("free_list_num", "intial size of free lists",
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8, &mca_btl_ud_component.ib_free_list_num);
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mca_btl_ud_param_register_int ("free_list_max", "maximum size of free lists",
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-1, &mca_btl_ud_component.ib_free_list_max);
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mca_btl_ud_param_register_int ("free_list_inc", "increment size of free lists",
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32, &mca_btl_ud_component.ib_free_list_inc);
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mca_btl_ud_param_register_string("mpool", "name of the memory pool to be used",
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"openib", &mca_btl_ud_component.ib_mpool_name);
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mca_btl_ud_param_register_int("reg_mru_len", "length of the registration cache most recently used list",
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16, (int*) &mca_btl_ud_component.reg_mru_len);
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#ifdef OMPI_MCA_BTL_OPENIB_HAVE_SRQ
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mca_btl_ud_param_register_int("use_srq", "if 1 use the IB shared receive queue to post receive descriptors",
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0, (int*) &mca_btl_ud_component.use_srq);
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#endif
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mca_btl_ud_param_register_int("ib_cq_size", "size of the IB completion queue",
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2000, (int*) &mca_btl_ud_component.ib_cq_size);
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mca_btl_ud_param_register_int("ib_sg_list_size", "size of IB segment list",
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4, (int*) &mca_btl_ud_component.ib_sg_list_size);
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mca_btl_ud_param_register_int("ib_pkey_ix", "IB pkey index",
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0, (int*) &mca_btl_ud_component.ib_pkey_ix);
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mca_btl_ud_param_register_int("ib_qkey", "IB qkey",
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0x01330133, (int*) &mca_btl_ud_component.ib_qkey);
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mca_btl_ud_param_register_int("ib_service_level", "IB service level",
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0, (int*) &mca_btl_ud_component.ib_service_level);
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mca_btl_ud_param_register_int("ib_src_path_bits", "IB source path bits",
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0, (int*) &mca_btl_ud_component.ib_src_path_bits);
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mca_btl_ud_param_register_int ("exclusivity", "BTL exclusivity",
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MCA_BTL_EXCLUSIVITY_DEFAULT, (int*) &mca_btl_ud_module.super.btl_exclusivity);
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mca_btl_ud_param_register_int("sd_num", "maximum descriptors to post to a QP",
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16, (int*) &mca_btl_ud_component.sd_num);
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mca_btl_ud_param_register_int("rd_num", "number of receive descriptors to post to a QP",
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500, (int*) &mca_btl_ud_component.rd_num);
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mca_btl_ud_param_register_int("srq_rd_max", "Max number of receive descriptors posted per SRQ.",
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1000, (int*) &mca_btl_ud_component.srq_rd_max);
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mca_btl_ud_param_register_int("srq_rd_per_peer", "Number of receive descriptors posted per peer. (SRQ)",
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16, (int*) &mca_btl_ud_component.srq_rd_per_peer);
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mca_btl_ud_param_register_int("srq_sd_max", "Maximum number of send descriptors posted. (SRQ)",
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8, &mca_btl_ud_component.srq_sd_max);
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/* TODO - this assumes a 2k UD MTU - should query/do something more intelligent */
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mca_btl_ud_param_register_int ("eager_limit", "eager send limit",
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2047, &val);
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mca_btl_ud_module.super.btl_eager_limit = val;
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mca_btl_ud_param_register_int ("min_send_size", "minimum send size",
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2048, &val);
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mca_btl_ud_module.super.btl_min_send_size = val;
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mca_btl_ud_param_register_int ("max_send_size", "maximum send size",
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2048, &val);
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mca_btl_ud_module.super.btl_max_send_size = val;
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mca_btl_ud_param_register_int("bandwidth", "Approximate maximum bandwidth of interconnect",
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800, (int*) &mca_btl_ud_module.super.btl_bandwidth);
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mca_btl_ud_module.super.btl_eager_limit -= sizeof(mca_btl_ud_header_t);
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mca_btl_ud_module.super.btl_max_send_size -= sizeof(mca_btl_ud_header_t);
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mca_btl_ud_component.max_send_size = mca_btl_ud_module.super.btl_max_send_size;
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mca_btl_ud_component.eager_limit = mca_btl_ud_module.super.btl_eager_limit;
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return OMPI_SUCCESS;
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}
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/*
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* component cleanup - sanity checking of queue lengths
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*/
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int mca_btl_ud_component_close(void)
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{
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/* Calculate and print profiling numbers */
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MCA_BTL_UD_SHOW_TIME(post_send);
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MCA_BTL_UD_SHOW_TIME(endpoint_send_conn);
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MCA_BTL_UD_SHOW_TIME(ibv_post_send);
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MCA_BTL_UD_SHOW_TIME(full_send);
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return OMPI_SUCCESS;
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}
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/*
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* Register UD port information. The MCA framework
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* will make this available to all peers.
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*/
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/* TODO - We need to publish an addr_t (formerly rem_info_t) here */
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static int
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mca_btl_ud_modex_send(void)
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{
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int rc;
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size_t i;
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size_t size;
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mca_btl_ud_addr_t* addrs = NULL;
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size = mca_btl_ud_component.ib_num_btls * sizeof(mca_btl_ud_addr_t);
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if (size != 0) {
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addrs = (mca_btl_ud_addr_t *)malloc(size);
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if (NULL == addrs) {
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return OMPI_ERR_OUT_OF_RESOURCE;
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}
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for (i = 0; i < mca_btl_ud_component.ib_num_btls; i++) {
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mca_btl_ud_module_t* btl = &mca_btl_ud_component.ud_btls[i];
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addrs[i] = btl->addr;
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BTL_VERBOSE(("modex_send HP QP num %d, LP QP num %d, LID = %d",
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addrs[i].qp_num_hp,
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addrs[i].qp_num_lp,
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addrs[i].lid));
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}
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}
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rc = mca_pml_base_modex_send(&mca_btl_ud_component.super.btl_version, addrs, size);
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if(NULL != addrs) {
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free (addrs);
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}
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return rc;
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}
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/*
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* UD component initialization:
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* (1) read interface list from kernel and compare against component parameters
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* then create a BTL instance for selected interfaces
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* (2) post OOB receive for incoming connection attempts
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* (3) register BTL parameters with the MCA
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*/
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mca_btl_base_module_t** mca_btl_ud_component_init(int *num_btl_modules,
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bool enable_progress_threads,
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bool enable_mpi_threads)
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{
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struct ibv_device **ib_devs;
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struct ibv_device* ib_dev;
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int32_t num_devs;
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mca_btl_base_module_t** btls;
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uint32_t i, j;
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opal_list_t btl_list;
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mca_btl_ud_module_t* ud_btl;
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mca_btl_base_selected_module_t* ib_selected;
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opal_list_item_t* item;
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unsigned short seedv[3];
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/* initialization */
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*num_btl_modules = 0;
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num_devs = 0;
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seedv[0] = orte_process_info.my_name->vpid;
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seedv[1] = opal_sys_timer_get_cycles();
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seedv[2] = opal_sys_timer_get_cycles();
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seed48(seedv);
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#if OMPI_MCA_BTL_OPENIB_HAVE_DEVICE_LIST
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ib_devs = ibv_get_device_list(&num_devs);
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#else
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/* Determine the number of hca's available on the host */
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dev_list = ibv_get_devices();
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if (NULL == dev_list) {
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mca_btl_base_error_no_nics("OpenIB", "HCA");
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mca_btl_ud_component.ib_num_btls = 0;
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mca_btl_ud_modex_send();
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return NULL;
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}
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dlist_start(dev_list);
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dlist_for_each_data(dev_list, ib_dev, struct ibv_device)
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num_devs++;
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#endif
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if(0 == num_devs) {
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mca_btl_base_error_no_nics("OpenIB", "HCA");
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mca_btl_ud_modex_send();
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return NULL;
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}
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#if OMPI_MCA_BTL_OPENIB_HAVE_DEVICE_LIST == 0
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/* Allocate space for the ib devices */
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ib_devs = (struct ibv_device**) malloc(num_devs * sizeof(struct ibv_dev*));
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if(NULL == ib_devs) {
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ORTE_ERROR_LOG(ORTE_ERR_OUT_OF_RESOURCE);
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return NULL;
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}
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dlist_start(dev_list);
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i = 0;
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dlist_for_each_data(dev_list, ib_dev, struct ibv_device)
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ib_devs[i++] = ib_dev;
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#endif
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/** We must loop through all the hca id's, get their handles and
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for each hca we query the number of ports on the hca and set up
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a distinct btl module for each hca port */
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OBJ_CONSTRUCT(&btl_list, opal_list_t);
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OBJ_CONSTRUCT(&mca_btl_ud_component.ib_lock, opal_mutex_t);
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for(i = 0; (int32_t)i < num_devs
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&& mca_btl_ud_component.ib_num_btls < mca_btl_ud_component.ib_max_btls; i++){
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struct ibv_device_attr ib_dev_attr;
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struct ibv_context* ib_dev_context;
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ib_dev = ib_devs[i];
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ib_dev_context = ibv_open_device(ib_dev);
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if(!ib_dev_context) {
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BTL_ERROR((" error obtaining device context for %s errno says %s\n", ibv_get_device_name(ib_dev), strerror(errno)));
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return NULL;
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}
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if(ibv_query_device(ib_dev_context, &ib_dev_attr)){
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BTL_ERROR(("error obtaining device attributes for %s errno says %s\n", ibv_get_device_name(ib_dev), strerror(errno)));
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return NULL;
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}
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/* Note ports are 1 based hence j = 1 */
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for(j = 1; j <= ib_dev_attr.phys_port_cnt; j++) {
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struct ibv_port_attr ib_port_attr;
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if(ibv_query_port(ib_dev_context, (uint8_t)j, &ib_port_attr)) {
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BTL_ERROR(("error getting port attributes for device %s port number %d errno says %s",
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ibv_get_device_name(ib_dev), j, strerror(errno)));
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return NULL;
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}
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if(IBV_PORT_ACTIVE == ib_port_attr.state) {
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ud_btl =
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(mca_btl_ud_module_t*)malloc(sizeof(mca_btl_ud_module_t));
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memcpy(ud_btl, &mca_btl_ud_module, sizeof(mca_btl_ud_module_t));
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ib_selected = OBJ_NEW(mca_btl_base_selected_module_t);
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ib_selected->btl_module = (mca_btl_base_module_t*)ud_btl;
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ud_btl->ib_dev = ib_dev;
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ud_btl->ib_dev_context = ib_dev_context;
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ud_btl->port_num = (uint8_t)j;
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ud_btl->addr.subnet = ib_port_attr.sm_lid;
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ud_btl->addr.lid = ib_port_attr.lid;
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opal_list_append(&btl_list, (opal_list_item_t*) ib_selected);
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if(++mca_btl_ud_component.ib_num_btls >=
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mca_btl_ud_component.ib_max_btls)
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break;
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}
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}
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}
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/* Allocate space for btl modules */
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mca_btl_ud_component.ud_btls = (mca_btl_ud_module_t*)
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malloc(sizeof(mca_btl_ud_module_t) * mca_btl_ud_component.ib_num_btls);
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if(NULL == mca_btl_ud_component.ud_btls) {
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ORTE_ERROR_LOG(ORTE_ERR_OUT_OF_RESOURCE);
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return NULL;
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}
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btls = (struct mca_btl_base_module_t**)
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malloc(mca_btl_ud_component.ib_num_btls * sizeof(mca_btl_ud_module_t*));
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if(NULL == btls) {
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ORTE_ERROR_LOG(ORTE_ERR_OUT_OF_RESOURCE);
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return NULL;
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}
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for(i = 0; i < mca_btl_ud_component.ib_num_btls; i++){
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item = opal_list_remove_first(&btl_list);
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ib_selected = (mca_btl_base_selected_module_t*)item;
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ud_btl = (mca_btl_ud_module_t*)ib_selected->btl_module;
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memcpy(&(mca_btl_ud_component.ud_btls[i]),
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ud_btl, sizeof(mca_btl_ud_module_t));
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free(ib_selected);
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free(ud_btl);
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ud_btl = &mca_btl_ud_component.ud_btls[i];
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ud_btl->rd_num = mca_btl_ud_component.rd_num;
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ud_btl->sd_wqe_lp = mca_btl_ud_component.sd_num;
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ud_btl->sd_wqe_hp = mca_btl_ud_component.sd_num;
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/* Initialize module state */
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if(mca_btl_ud_module_init(ud_btl) != OMPI_SUCCESS) {
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#if OMPI_MCA_BTL_OPENIB_HAVE_DEVICE_LIST
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ibv_free_device_list(ib_devs);
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#else
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free(ib_devs);
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#endif
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return NULL;
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}
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btls[i] = &ud_btl->super;
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}
|
|
|
|
mca_btl_ud_modex_send();
|
|
|
|
*num_btl_modules = mca_btl_ud_component.ib_num_btls;
|
|
#if OMPI_MCA_BTL_OPENIB_HAVE_DEVICE_LIST
|
|
ibv_free_device_list(ib_devs);
|
|
#else
|
|
free(ib_devs);
|
|
#endif
|
|
return btls;
|
|
}
|
|
|
|
|
|
/*
|
|
* IB component progress.
|
|
*/
|
|
|
|
#define MCA_BTL_UD_NUM_WC 64
|
|
|
|
int mca_btl_ud_component_progress()
|
|
{
|
|
uint32_t i;
|
|
int count = 0, ne, j;
|
|
mca_btl_ud_frag_t* frag;
|
|
struct ibv_recv_wr* bad_wr;
|
|
struct ibv_recv_wr* head_wr;
|
|
mca_btl_ud_module_t* ud_btl;
|
|
mca_btl_base_recv_reg_t* reg;
|
|
struct ibv_wc wc[MCA_BTL_UD_NUM_WC];
|
|
struct ibv_wc* cwc;
|
|
|
|
/* Poll for completions */
|
|
for(i = 0; i < mca_btl_ud_component.ib_num_btls; i++) {
|
|
ud_btl = &mca_btl_ud_component.ud_btls[i];
|
|
|
|
ne = ibv_poll_cq(ud_btl->ib_cq_hp, MCA_BTL_UD_NUM_WC, wc);
|
|
if(OPAL_UNLIKELY(ne < 0)) {
|
|
BTL_ERROR(("error polling HP CQ with %d errno says %s\n",
|
|
ne, strerror(errno)));
|
|
return OMPI_ERROR;
|
|
}
|
|
|
|
head_wr = NULL;
|
|
|
|
for(j = 0; j < ne; j++) {
|
|
cwc = &wc[j];
|
|
if(OPAL_UNLIKELY(cwc->status != IBV_WC_SUCCESS)) {
|
|
BTL_ERROR(("error polling HP CQ with status %d for wr_id %llu opcode %d\n",
|
|
cwc->status, cwc->wr_id, cwc->opcode));
|
|
return OMPI_ERROR;
|
|
}
|
|
|
|
/* Handle work completions */
|
|
switch(cwc->opcode) {
|
|
case IBV_WC_SEND :
|
|
frag = (mca_btl_ud_frag_t*)(unsigned long)cwc->wr_id;
|
|
|
|
frag->base.des_cbfunc(&ud_btl->super,
|
|
frag->endpoint, &frag->base, OMPI_SUCCESS);
|
|
|
|
/* Increment send counter, post if any sends are queued */
|
|
OPAL_THREAD_ADD32(&ud_btl->sd_wqe_hp, 1);
|
|
if(OPAL_UNLIKELY(!opal_list_is_empty(&ud_btl->pending_frags_hp))) {
|
|
frag = (mca_btl_ud_frag_t*)
|
|
opal_list_remove_first(&ud_btl->pending_frags_hp);
|
|
mca_btl_ud_endpoint_post_send(ud_btl, frag->endpoint, frag);
|
|
}
|
|
|
|
break;
|
|
|
|
case IBV_WC_RECV:
|
|
frag = (mca_btl_ud_frag_t*)(unsigned long)cwc->wr_id;
|
|
reg = &ud_btl->ib_reg[frag->hdr->tag];
|
|
|
|
frag->segment.seg_addr.pval = frag->hdr + 1;
|
|
frag->segment.seg_len = cwc->byte_len -
|
|
sizeof(mca_btl_ud_header_t) -
|
|
sizeof(mca_btl_ud_ib_header_t);
|
|
|
|
reg->cbfunc(&ud_btl->super,
|
|
frag->hdr->tag, &frag->base, reg->cbdata);
|
|
|
|
/* Add recv to linked list for reposting */
|
|
frag->wr_desc.rd_desc.next = head_wr;
|
|
head_wr = &frag->wr_desc.rd_desc;
|
|
break;
|
|
|
|
default:
|
|
BTL_ERROR(("Unhandled work completion opcode is %d", cwc->opcode));
|
|
break;
|
|
}
|
|
}
|
|
|
|
count += ne;
|
|
|
|
/* Repost any HP recv buffers all at once */
|
|
if(OPAL_LIKELY(head_wr)) {
|
|
if(OPAL_UNLIKELY(ibv_post_recv(ud_btl->qp_hp, head_wr, &bad_wr))) {
|
|
BTL_ERROR(("error posting recv, errno %s\n", strerror(errno)));
|
|
return OMPI_ERROR;
|
|
}
|
|
|
|
head_wr = NULL;
|
|
}
|
|
|
|
ne = ibv_poll_cq(ud_btl->ib_cq_lp, MCA_BTL_UD_NUM_WC, wc);
|
|
if(OPAL_UNLIKELY(ne < 0)){
|
|
BTL_ERROR(("error polling LP CQ with %d errno says %s",
|
|
ne, strerror(errno)));
|
|
return OMPI_ERROR;
|
|
}
|
|
|
|
for(j = 0; j < ne; j++) {
|
|
cwc = &wc[j];
|
|
if(OPAL_UNLIKELY(cwc->status != IBV_WC_SUCCESS)) {
|
|
BTL_ERROR(("error polling LP CQ with status %d for wr_id %llu opcode %d",
|
|
cwc->status, cwc->wr_id, cwc->opcode));
|
|
return OMPI_ERROR;
|
|
}
|
|
|
|
/* Handle n/w completions */
|
|
switch(cwc->opcode) {
|
|
case IBV_WC_SEND:
|
|
frag = (mca_btl_ud_frag_t*) (unsigned long) cwc->wr_id;
|
|
|
|
frag->base.des_cbfunc(&ud_btl->super,
|
|
frag->endpoint, &frag->base, OMPI_SUCCESS);
|
|
|
|
/* Increment send counter, post if any sends are queued */
|
|
OPAL_THREAD_ADD32(&ud_btl->sd_wqe_lp, 1);
|
|
if(OPAL_UNLIKELY(!opal_list_is_empty(&ud_btl->pending_frags_lp))) {
|
|
frag = (mca_btl_ud_frag_t*)
|
|
opal_list_remove_first(&ud_btl->pending_frags_lp);
|
|
mca_btl_ud_endpoint_post_send(ud_btl, frag->endpoint, frag);
|
|
}
|
|
|
|
break;
|
|
|
|
case IBV_WC_RECV:
|
|
/* Process a RECV */
|
|
frag = (mca_btl_ud_frag_t*) (unsigned long) cwc->wr_id;
|
|
reg = &ud_btl->ib_reg[frag->hdr->tag];
|
|
|
|
frag->segment.seg_addr.pval = frag->hdr + 1;
|
|
frag->segment.seg_len =
|
|
cwc->byte_len - sizeof(mca_btl_ud_header_t) -
|
|
sizeof(mca_btl_ud_ib_header_t);
|
|
|
|
/* call registered callback */
|
|
reg->cbfunc(&ud_btl->super,
|
|
frag->hdr->tag, &frag->base, reg->cbdata);
|
|
|
|
/* Add recv to linked list for reposting */
|
|
frag->wr_desc.rd_desc.next = head_wr;
|
|
head_wr = &frag->wr_desc.rd_desc;
|
|
break;
|
|
|
|
default:
|
|
BTL_ERROR(("Unhandled work completion opcode %d", cwc->opcode));
|
|
break;
|
|
}
|
|
}
|
|
|
|
count += ne;
|
|
|
|
/* Repost any LP recv buffers all at once */
|
|
if(OPAL_LIKELY(head_wr)) {
|
|
if(OPAL_UNLIKELY(ibv_post_recv(ud_btl->qp_lp, head_wr, &bad_wr))) {
|
|
BTL_ERROR(("error posting recv, errno %s\n", strerror(errno)));
|
|
return OMPI_ERROR;
|
|
}
|
|
}
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|