Fix the SPC initialization.
Use the PVAR ctx to save the SPC index, so that no lookup nor restriction on the SPC vars position is imposed. Make sure the PVAR are always registered. Signed-off-by: George Bosilca <bosilca@icl.utk.edu>
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7dab8c002b
Коммит
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@ -1,11 +1,13 @@
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/*
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* Copyright (c) 2018 The University of Tennessee and The University
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* Copyright (c) 2018-2019 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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*
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* Copyright (c) 2018 Cisco Systems, Inc. All rights reserved
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* Copyright (c) 2018 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* Copyright (c) 2019 Mellanox Technologies, Inc.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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@ -20,10 +22,8 @@ opal_timer_t sys_clock_freq_mhz = 0;
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static void ompi_spc_dump(void);
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/* Array for converting from SPC indices to MPI_T indices */
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OMPI_DECLSPEC int mpi_t_offset = -1;
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OMPI_DECLSPEC bool mpi_t_enabled = false;
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OPAL_DECLSPEC ompi_communicator_t *ompi_spc_comm = NULL;
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static bool mpi_t_enabled = false;
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static ompi_communicator_t *ompi_spc_comm = NULL;
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typedef struct ompi_spc_event_t {
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const char* counter_name;
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@ -185,6 +185,8 @@ static int ompi_spc_notify(mca_base_pvar_t *pvar, mca_base_pvar_event_t event, v
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return MPI_SUCCESS;
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}
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index = (int)(uintptr_t)pvar->ctx; /* Convert from MPI_T pvar index to SPC index */
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/* For this event, we need to set count to the number of long long type
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* values for this counter. All SPC counters are one long long, so we
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* always set count to 1.
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@ -194,14 +196,10 @@ static int ompi_spc_notify(mca_base_pvar_t *pvar, mca_base_pvar_event_t event, v
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}
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/* For this event, we need to turn on the counter */
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else if(MCA_BASE_PVAR_HANDLE_START == event) {
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/* Convert from MPI_T pvar index to SPC index */
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index = pvar->pvar_index - mpi_t_offset;
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SET_SPC_BIT(ompi_spc_attached_event, index);
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}
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/* For this event, we need to turn off the counter */
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else if(MCA_BASE_PVAR_HANDLE_STOP == event) {
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/* Convert from MPI_T pvar index to SPC index */
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index = pvar->pvar_index - mpi_t_offset;
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CLEAR_SPC_BIT(ompi_spc_attached_event, index);
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}
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@ -231,7 +229,7 @@ static int ompi_spc_get_count(const struct mca_base_pvar_t *pvar, void *value, v
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}
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/* Convert from MPI_T pvar index to SPC index */
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int index = pvar->pvar_index - mpi_t_offset;
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int index = (int)(uintptr_t)pvar->ctx;
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/* Set the counter value to the current SPC value */
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*counter_value = (long long)ompi_spc_events[index].value;
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/* If this is a timer-based counter, convert from cycles to microseconds */
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@ -287,14 +285,6 @@ void ompi_spc_init(void)
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char **arg_strings = opal_argv_split(ompi_mpi_spc_attach_string, ',');
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int num_args = opal_argv_count(arg_strings);
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/* Reset all timer-based counters */
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for(i = 0; i < OMPI_SPC_NUM_COUNTERS; i++) {
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CLEAR_SPC_BIT(ompi_spc_timer_event, i);
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}
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/* If this is a timer event, set the corresponding timer_event entry */
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SET_SPC_BIT(ompi_spc_timer_event, OMPI_SPC_MATCH_TIME);
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/* If there is only one argument and it is 'all', then all counters
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* should be turned on. If the size is 0, then no counters will be enabled.
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*/
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@ -304,47 +294,43 @@ void ompi_spc_init(void)
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}
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}
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/* Turn on only the counters that were specified in the MCA parameter */
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for(i = 0; i < OMPI_SPC_NUM_COUNTERS; i++) {
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if(all_on) {
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found++;
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} else {
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matched = 0;
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/* Note: If no arguments were given, this will be skipped */
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/* Reset all timer-based counters */
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CLEAR_SPC_BIT(ompi_spc_timer_event, i);
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matched = all_on;
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if( !matched ) {
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/* Turn on only the counters that were specified in the MCA parameter */
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for(j = 0; j < num_args; j++) {
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if( 0 == strcmp(ompi_spc_events_names[i].counter_name, arg_strings[j]) ) {
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found++;
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matched = 1;
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break;
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}
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}
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}
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if (all_on || matched) {
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if (matched) {
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SET_SPC_BIT(ompi_spc_attached_event, i);
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mpi_t_enabled = true;
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found++;
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}
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/* Registers the current counter as an MPI_T pvar regardless of whether it's been turned on or not */
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ret = mca_base_pvar_register("ompi", "runtime", "spc", ompi_spc_events_names[i].counter_name, ompi_spc_events_names[i].counter_description,
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OPAL_INFO_LVL_4, MPI_T_PVAR_CLASS_SIZE,
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MCA_BASE_VAR_TYPE_UNSIGNED_LONG_LONG, NULL, MPI_T_BIND_NO_OBJECT,
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MCA_BASE_PVAR_FLAG_READONLY | MCA_BASE_PVAR_FLAG_CONTINUOUS,
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ompi_spc_get_count, NULL, ompi_spc_notify, NULL);
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/* Check to make sure that ret is a valid index and not an error code */
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if( ret >= 0 ) {
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if( mpi_t_offset == -1 ) {
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mpi_t_offset = ret;
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}
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}
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if( (ret < 0) || (ret != (mpi_t_offset + found - 1)) ) {
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mpi_t_enabled = false;
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opal_show_help("help-mpi-runtime.txt", "spc: MPI_T disabled", true);
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break;
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}
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/* Registers the current counter as an MPI_T pvar regardless of whether it's been turned on or not */
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ret = mca_base_pvar_register("ompi", "runtime", "spc", ompi_spc_events_names[i].counter_name, ompi_spc_events_names[i].counter_description,
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OPAL_INFO_LVL_4, MPI_T_PVAR_CLASS_SIZE,
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MCA_BASE_VAR_TYPE_UNSIGNED_LONG_LONG, NULL, MPI_T_BIND_NO_OBJECT,
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MCA_BASE_PVAR_FLAG_READONLY | MCA_BASE_PVAR_FLAG_CONTINUOUS,
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ompi_spc_get_count, NULL, ompi_spc_notify, (void*)(uintptr_t)i);
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if( ret < 0 ) {
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mpi_t_enabled = false;
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opal_show_help("help-mpi-runtime.txt", "spc: MPI_T disabled", true);
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break;
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}
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}
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/* If this is a timer event, set the corresponding timer_event entry */
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SET_SPC_BIT(ompi_spc_timer_event, OMPI_SPC_MATCH_TIME);
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opal_argv_free(arg_strings);
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}
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