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opal: remove generated asm code

Every modern compiler supports either inline assembly or builtin atomic
operations. Because of this it is time to delete all the code associated
with pre-built atomics.

This commit also clean out the DEC and XLC asm checks. Neither check
does anything and the XLC compiler supports GCC ASM.

Signed-off-by: Nathan Hjelm <hjelmn@lanl.gov>
This commit is contained in:
Nathan Hjelm 2017-08-01 16:34:36 -06:00 committed by Nathan Hjelm
parent 29b059e4eb
commit ebce88b7ad
22 changed files with 12 additions and 1912 deletions

View File

@ -884,6 +884,7 @@ return ret;
if test "$asm_result" = "yes" ; then
OPAL_C_GCC_INLINE_ASSEMBLY=1
opal_cv_asm_inline_supported="yes"
else
OPAL_C_GCC_INLINE_ASSEMBLY=0
fi
@ -895,70 +896,6 @@ return ret;
unset OPAL_C_GCC_INLINE_ASSEMBLY assembly asm_result
])dnl
dnl #################################################################
dnl
dnl OPAL_CHECK_INLINE_DEC
dnl
dnl DEFINE OPAL_DEC to 0 or 1 depending on DEC
dnl support
dnl
dnl #################################################################
AC_DEFUN([OPAL_CHECK_INLINE_C_DEC],[
AC_MSG_CHECKING([if $CC supports DEC inline assembly])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
AC_INCLUDES_DEFAULT
#include <c_asm.h>],
[[asm("");
return 0;]])],
[asm_result="yes"], [asm_result="no"])
AC_MSG_RESULT([$asm_result])
if test "$asm_result" = "yes" ; then
OPAL_C_DEC_INLINE_ASSEMBLY=1
else
OPAL_C_DEC_INLINE_ASSEMBLY=0
fi
AC_DEFINE_UNQUOTED([OPAL_C_DEC_INLINE_ASSEMBLY],
[$OPAL_C_DEC_INLINE_ASSEMBLY],
[Whether C compiler supports DEC style inline assembly])
unset OPAL_C_DEC_INLINE_ASSEMBLY asm_result
])dnl
dnl #################################################################
dnl
dnl OPAL_CHECK_INLINE_XLC
dnl
dnl DEFINE OPAL_XLC to 0 or 1 depending on XLC
dnl support
dnl
dnl #################################################################
AC_DEFUN([OPAL_CHECK_INLINE_C_XLC],[
AC_MSG_CHECKING([if $CC supports XLC inline assembly])
OPAL_C_XLC_INLINE_ASSEMBLY=0
asm_result="no"
if test "$CC" = "xlc" ; then
OPAL_XLC_INLINE_ASSEMBLY=1
asm_result="yes"
fi
AC_MSG_RESULT([$asm_result])
AC_DEFINE_UNQUOTED([OPAL_C_XLC_INLINE_ASSEMBLY],
[$OPAL_C_XLC_INLINE_ASSEMBLY],
[Whether C compiler supports XLC style inline assembly])
unset OPAL_C_XLC_INLINE_ASSEMBLY
])dnl
dnl #################################################################
dnl
dnl OPAL_CONFIG_ASM
@ -1163,10 +1100,9 @@ AC_MSG_ERROR([Can not continue.])
;;
esac
opal_cv_asm_inline_supported="no"
# now that we know our architecture, try to inline assemble
OPAL_CHECK_INLINE_C_GCC([$OPAL_GCC_INLINE_ASSIGN])
OPAL_CHECK_INLINE_C_DEC
OPAL_CHECK_INLINE_C_XLC
# format:
# config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack
@ -1251,64 +1187,10 @@ AC_DEFUN([OPAL_ASM_FIND_FILE], [
AC_REQUIRE([AC_PROG_GREP])
AC_REQUIRE([AC_PROG_FGREP])
if test "$opal_cv_asm_arch" != "WINDOWS" && test "$opal_cv_asm_builtin" != "BUILTIN_SYNC" && test "$opal_cv_asm_builtin" != "BUILTIN_GCC" && test "$opal_cv_asm_builtin" != "BUILTIN_OSX" ; then
# see if we have a pre-built one already
AC_MSG_CHECKING([for pre-built assembly file])
opal_cv_asm_file=""
if $GREP "$opal_cv_asm_arch" "${OPAL_TOP_SRCDIR}/opal/asm/asm-data.txt" | $FGREP "$opal_cv_asm_format" >conftest.out 2>&1 ; then
opal_cv_asm_file="`cut -f3 conftest.out`"
if test ! "$opal_cv_asm_file" = "" ; then
opal_cv_asm_file="atomic-${opal_cv_asm_file}.s"
if test -f "${OPAL_TOP_SRCDIR}/opal/asm/generated/${opal_cv_asm_file}" ; then
AC_MSG_RESULT([yes ($opal_cv_asm_file)])
else
AC_MSG_RESULT([no ($opal_cv_asm_file not found)])
opal_cv_asm_file=""
fi
fi
else
AC_MSG_RESULT([no (not in asm-data)])
fi
rm -rf conftest.*
if test "$opal_cv_asm_file" = "" ; then
# Can we generate a file?
AC_MSG_CHECKING([whether possible to generate assembly file])
mkdir -p opal/asm/generated
opal_cv_asm_file="atomic-local.s"
opal_try='$PERL $OPAL_TOP_SRCDIR/opal/asm/generate-asm.pl $opal_cv_asm_arch "$opal_cv_asm_format" $OPAL_TOP_SRCDIR/opal/asm/base $OPAL_TOP_BUILDDIR/opal/asm/generated/$opal_cv_asm_file >conftest.out 2>&1'
if AC_TRY_EVAL(opal_try) ; then
# save the warnings
cat conftest.out >&AC_FD_CC
AC_MSG_RESULT([yes])
else
# save output
cat conftest.out >&AC_FD_CC
opal_cv_asm_file=""
AC_MSG_RESULT([failed])
AC_MSG_WARN([Could not build atomic operations assembly file.])
AC_MSG_WARN([There will be no atomic operations for this build.])
fi
fi
rm -rf conftest.*
if test "$opal_cv_asm_arch" != "WINDOWS" && test "$opal_cv_asm_builtin" != "BUILTIN_SYNC" && test "$opal_cv_asm_builtin" != "BUILTIN_GCC" && test "$opal_cv_asm_builtin" != "BUILTIN_OSX" && test "$opal_cv_asm_inline_arch" = "no" ; then
AC_MSG_ERROR([no atomic support available. exiting])
else
# On windows with VC++, atomics are done with compiler primitives
opal_cv_asm_file=""
fi
AC_MSG_CHECKING([for atomic assembly filename])
if test "$opal_cv_asm_file" = "" ; then
AC_MSG_RESULT([none])
result=0
else
AC_MSG_RESULT([$opal_cv_asm_file])
result=1
fi
AC_DEFINE_UNQUOTED([OPAL_HAVE_ASM_FILE], [$result],
[Whether there is an atomic assembly file available])
AM_CONDITIONAL([OPAL_HAVE_ASM_FILE], [test "$result" = "1"])
OPAL_ASM_FILE=$opal_cv_asm_file
AC_SUBST(OPAL_ASM_FILE)
])dnl

View File

@ -15,7 +15,6 @@ AC_DEFUN([OPAL_CONFIG_FILES],[
opal/Makefile
opal/etc/Makefile
opal/include/Makefile
opal/asm/Makefile
opal/datatype/Makefile
opal/util/Makefile
opal/util/keyval/Makefile

View File

@ -22,7 +22,6 @@
SUBDIRS = \
include \
asm \
datatype \
etc \
util \
@ -37,7 +36,6 @@ SUBDIRS = \
# therefore make distclean will fail).
DIST_SUBDIRS = \
include \
asm \
datatype \
etc \
util \
@ -50,7 +48,6 @@ DIST_SUBDIRS = \
lib_LTLIBRARIES = lib@OPAL_LIB_PREFIX@open-pal.la
lib@OPAL_LIB_PREFIX@open_pal_la_SOURCES =
lib@OPAL_LIB_PREFIX@open_pal_la_LIBADD = \
asm/libasm.la \
datatype/libdatatype.la \
mca/base/libmca_base.la \
util/libopalutil.la \

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@ -1,93 +0,0 @@
#
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
# University Research and Technology
# Corporation. All rights reserved.
# Copyright (c) 2004-2005 The University of Tennessee and The University
# of Tennessee Research Foundation. All rights
# reserved.
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
# University of Stuttgart. All rights reserved.
# Copyright (c) 2004-2005 The Regents of the University of California.
# All rights reserved.
# Copyright (c) 2011-2014 Cisco Systems, Inc. All rights reserved.
# Copyright (c) 2017 Research Organization for Information Science
# and Technology (RIST). All rights reserved.
# $COPYRIGHT$
#
# Additional copyrights may follow
#
# $HEADER$
#
include $(top_srcdir)/Makefile.ompi-rules
######################################################################
#
# This is a bit complicated. If there is anything in the library,
# it will always be atomic-asm.S. We just symlink atomic-asm.S to
# the best atomic operations available (as determined at configure
# time)
#
######################################################################
generated/@OPAL_ASM_FILE@: base/@OPAL_ASSEMBLY_ARCH@.asm
@ if test ! -f "$(top_srcdir)/opal/asm/$@" ; then \
cmd="$(PERL) '$(top_srcdir)/opal/asm/generate-asm.pl' '@OPAL_ASSEMBLY_ARCH@' '@OPAL_ASSEMBLY_FORMAT@' '$(top_srcdir)/opal/asm/base' '$(top_builddir)/opal/asm/generated/@OPAL_ASM_FILE@'" ; \
echo "$$cmd" ; \
eval $$cmd ; \
fi
atomic-asm.S: generated/@OPAL_ASM_FILE@
rm -f atomic-asm.S
@ if test -f "$(top_builddir)/opal/asm/generated/@OPAL_ASM_FILE@" ; then \
cmd="ln -s \"$(top_builddir)/opal/asm/generated/@OPAL_ASM_FILE@\" atomic-asm.S" ; \
echo "$$cmd" ; \
eval $$cmd ; \
else \
cmd="ln -s \"$(top_srcdir)/opal/asm/generated/@OPAL_ASM_FILE@\" atomic-asm.S" ; \
echo "$$cmd" ; \
eval $$cmd ; \
fi
if OPAL_HAVE_ASM_FILE
nodist_libasm_la_SOURCES = atomic-asm.S
libasm_la_DEPENDENCIES = generated/@OPAL_ASM_FILE@
else
nodist_libasm_la_SOURCES =
libasm_la_DEPENDENCIES =
endif
noinst_LTLIBRARIES = libasm.la
dist_libasm_la_SOURCES = asm.c
EXTRA_DIST = \
asm-data.txt \
generate-asm.pl \
generate-all-asm.pl \
base/aix.conf \
base/default.conf \
base/X86_64.asm \
base/ARM.asm \
base/IA32.asm \
base/IA64.asm \
base/MIPS.asm \
base/POWERPC32.asm \
base/POWERPC64.asm \
base/SPARCV9_32.asm \
base/SPARCV9_64.asm
######################################################################
clean-local:
rm -f atomic-asm.S
distclean-local:
rm -f generated/atomic-local.s
######################################################################
#
# Copy over all the generated files
#
dist-hook:
mkdir "${distdir}/generated"
$(PERL) "$(top_srcdir)/opal/asm/generate-all-asm.pl" "$(PERL)" "$(srcdir)" "$(distdir)"

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@ -1,133 +0,0 @@
# -*- sh -*-
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
# University Research and Technology
# Corporation. All rights reserved.
# Copyright (c) 2004-2005 The University of Tennessee and The University
# of Tennessee Research Foundation. All rights
# reserved.
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
# University of Stuttgart. All rights reserved.
# Copyright (c) 2004-2005 The Regents of the University of California.
# All rights reserved.
# Copyright (c) 2014 Intel, Inc. All rights reserved.
# Copyright (c) 2017 Research Organization for Information Science
# and Technology (RIST). All rights reserved.
# $COPYRIGHT$
#
# Additional copyrights may follow
#
# $HEADER$
#
#
# Database for mapping architecture and assembly format to prebuilt
# assembly files. For explination of the assembly operations, see
# the inline assembly header files in src/include/sys/<arch>.
#
# FORMAT:
# ARCHITECTURE ASSEMBLY FORMAT BASE FILENAME
#
# Assembly Format field:
# config_file-text-global-label_suffix-gsym-lsym-type-size-align_log-ppc_r_reg-64_bit-gnu_stack
######################################################################
#
# AMD Opteron / Intel EM64T
#
######################################################################
X86_64 default-.text-.globl-:--.L-@-1-0-1-1-1 x86_64-linux
X86_64 default-.text-.globl-:--.L-@-1-0-1-1-0 x86_64-linux-nongas
######################################################################
#
# ARM (ARMv7 and later)
#
######################################################################
ARM default-.text-.globl-:--.L-#-1-1-1-1-1 arm-linux
######################################################################
#
# Intel Pentium Class
#
######################################################################
IA32 default-.text-.globl-:--.L-@-1-0-1-1-1 ia32-linux
IA32 default-.text-.globl-:--.L-@-1-0-1-1-0 ia32-linux-nongas
IA32 default-.text-.globl-:-_-L--0-1-1-1-0 ia32-osx
IA32 default-.text-.globl-:-_-L--0-0-1-1-1 ia32-cygwin
IA32 default-.text-.globl-:-_-L--0-0-1-1-0 ia32-cygwin-nongas
######################################################################
#
# IA64 (Intel Itanium)
#
######################################################################
IA64 default-.text-.globl-:--.L-@-1-0-1-1-1 ia64-linux
IA64 default-.text-.globl-:--.L-@-1-0-1-1-0 ia64-linux-nongas
######################################################################
#
# PowerPC / POWER
#
######################################################################
# standard ppc instruction set (AIX calls it ppc). This is not the
# true intersection of all the POWER / PowerPC machines, but works
# on PowerPCs since the 601 and on at least POWER 3 and above.
POWERPC32 default-.text-.globl-:-_-L--0-1-1-0-0 powerpc32-osx
POWERPC32 default-.text-.globl-:--.L-@-1-1-0-0-1 powerpc32-linux
POWERPC32 default-.text-.globl-:--.L-@-1-1-0-0-0 powerpc32-linux-nongas
POWERPC32 aix-.csect .text[PR]-.globl-:-.-L--0-1-0-0-0 powerpc32-aix
# The ppc code above, plus support for the 64 bit operations. This
# mode is really only available on OS X when using the OS X 10.3
# compiler chain with the -mcpu=970 option.
POWERPC32 default-.text-.globl-:-_-L--0-1-1-1-0 powerpc32-64-osx
# PowerPC / POWER 64bit machines. sizeof(void*) == 8.
POWERPC64 default-.text-.globl-:-_-L--0-1-1-1-0 powerpc64-osx
POWERPC64 default-.text-.globl-:-.-.L-@-1-1-0-1-1 powerpc64-linux
POWERPC64 default-.text-.globl-:-.-.L-@-1-1-0-1-0 powerpc64-linux-nongas
POWERPC64 aix-.csect .text[PR]-.globl-:-.-L--0-1-0-1-0 powerpc64-aix
######################################################################
#
# SPARC / UltraSPARC (Scalalable Processor ARChitecture)
#
######################################################################
# Usually compiled with -xarch=v8plus. Basically Sparc V9, but with
# sizeof(void*) == 4 instead of 8. Different from V9_64 because still
# uses 2 registers to pass in a 64bit integer
SPARCV9_32 default-.text-.globl-:--.L-#-1-0-1-1-0 sparcv9-32-solaris
# The Sparc v9 (aka Ultra Sparc). Sizeof(void*) == 8.
SPARCV9_64 default-.text-.globl-:--.L-#-1-0-1-1-0 sparcv9-64-solaris
######################################################################
#
# MIPS III (Microprocessor without Interlocked Pipeline Stages)
# R4000 and above
#
######################################################################
# So MIPS, in it's infinite wisdom (thank you!) decided that when
# compiling in 32bit mode and passing in a 64bit integer, it is done
# in one register (instead of SPARC and POWER, who use two). Which
# means that we can use the same code either way. Woo hoo!
MIPS default-.text-.globl-:--L--1-1-1-1-0 mips-irix
MIPS default-.text-.globl-:--L--1-1-1-1-0 mips64el
MIPS default-.text-.globl-:--L-@-1-1-1-1-1 mips64-linux
# However, this doesn't hold true for 32-bit MIPS as used on Linux.
MIPS default-.text-.globl-:--L-@-1-1-1-0-1 mips-linux

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@ -1,74 +0,0 @@
/*
* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
* University Research and Technology
* Corporation. All rights reserved.
* Copyright (c) 2004-2005 The University of Tennessee and The University
* of Tennessee Research Foundation. All rights
* reserved.
* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
* University of Stuttgart. All rights reserved.
* Copyright (c) 2004-2005 The Regents of the University of California.
* All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
*
* $HEADER$
*/
#include "opal_config.h"
#include "opal/sys/atomic.h"
#include "opal/sys/architecture.h"
#if OPAL_ASSEMBLY_ARCH == OPAL_SPARC
#define LOCKS_TABLE_SIZE 8
/* make sure to get into reasonably useful bits (so shift at least 5) */
#define FIND_LOCK(addr) (&(locks_table[(((unsigned long) addr) >> 8) & \
(LOCKS_TABLE_SIZE - 1)]))
/* have to fix if you change LOCKS_TABLE_SIZE */
static opal_atomic_lock_t locks_table[LOCKS_TABLE_SIZE] = {
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } },
{ { OPAL_ATOMIC_UNLOCKED } }
};
int32_t
opal_atomic_add_32(volatile int32_t *addr, int delta)
{
int32_t ret;
opal_atomic_lock(FIND_LOCK(addr));
ret = (*addr += delta);
opal_atomic_unlock(FIND_LOCK(addr));
return ret;
}
int32_t
opal_atomic_sub_32(volatile int32_t *addr, int delta)
{
int32_t ret;
opal_atomic_lock(FIND_LOCK(addr));
ret = (*addr -= delta);
opal_atomic_unlock(FIND_LOCK(addr));
return ret;
}
#endif /* OPAL_ASSEMBLY_ARCH == OPAL_SPARC32 */

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@ -1,153 +0,0 @@
START_FILE
TEXT
ALIGN(4)
START_FUNC(opal_atomic_mb)
dmb
bx lr
END_FUNC(opal_atomic_mb)
START_FUNC(opal_atomic_rmb)
dmb
bx lr
END_FUNC(opal_atomic_rmb)
START_FUNC(opal_atomic_wmb)
dmb
bx lr
END_FUNC(opal_atomic_wmb)
START_FUNC(opal_atomic_cmpset_32)
LSYM(1)
ldrex r3, [r0]
cmp r1, r3
bne REFLSYM(2)
strex r12, r2, [r0]
cmp r12, #0
bne REFLSYM(1)
mov r0, #1
LSYM(2)
movne r0, #0
bx lr
END_FUNC(opal_atomic_cmpset_32)
START_FUNC(opal_atomic_cmpset_acq_32)
LSYM(3)
ldrex r3, [r0]
cmp r1, r3
bne REFLSYM(4)
strex r12, r2, [r0]
cmp r12, #0
bne REFLSYM(3)
dmb
mov r0, #1
LSYM(4)
movne r0, #0
bx lr
END_FUNC(opal_atomic_cmpset_acq_32)
START_FUNC(opal_atomic_cmpset_rel_32)
LSYM(5)
ldrex r3, [r0]
cmp r1, r3
bne REFLSYM(6)
dmb
strex r12, r2, [r0]
cmp r12, #0
bne REFLSYM(4)
mov r0, #1
LSYM(6)
movne r0, #0
bx lr
END_FUNC(opal_atomic_cmpset_rel_32)
#START_64BIT
START_FUNC(opal_atomic_cmpset_64)
push {r4-r7}
ldrd r6, r7, [sp, #16]
LSYM(7)
ldrexd r4, r5, [r0]
cmp r4, r2
it eq
cmpeq r5, r3
bne REFLSYM(8)
strexd r1, r6, r7, [r0]
cmp r1, #0
bne REFLSYM(7)
mov r0, #1
LSYM(8)
movne r0, #0
pop {r4-r7}
bx lr
END_FUNC(opal_atomic_cmpset_64)
START_FUNC(opal_atomic_cmpset_acq_64)
push {r4-r7}
ldrd r6, r7, [sp, #16]
LSYM(9)
ldrexd r4, r5, [r0]
cmp r4, r2
it eq
cmpeq r5, r3
bne REFLSYM(10)
strexd r1, r6, r7, [r0]
cmp r1, #0
bne REFLSYM(9)
dmb
mov r0, #1
LSYM(10)
movne r0, #0
pop {r4-r7}
bx lr
END_FUNC(opal_atomic_cmpset_acq_64)
START_FUNC(opal_atomic_cmpset_rel_64)
push {r4-r7}
ldrd r6, r7, [sp, #16]
LSYM(11)
ldrexd r4, r5, [r0]
cmp r4, r2
it eq
cmpeq r5, r3
bne REFLSYM(12)
dmb
strexd r1, r6, r7, [r0]
cmp r1, #0
bne REFLSYM(11)
mov r0, #1
LSYM(12)
movne r0, #0
pop {r4-r7}
bx lr
END_FUNC(opal_atomic_cmpset_rel_64)
#END_64BIT
START_FUNC(opal_atomic_add_32)
LSYM(13)
ldrex r2, [r0]
add r2, r2, r1
strex r3, r2, [r0]
cmp r3, #0
bne REFLSYM(13)
mov r0, r2
bx lr
END_FUNC(opal_atomic_add_32)
START_FUNC(opal_atomic_sub_32)
LSYM(14)
ldrex r2, [r0]
sub r2, r2, r1
strex r3, r2, [r0]
cmp r3, #0
bne REFLSYM(14)
mov r0, r2
bx lr
END_FUNC(opal_atomic_sub_32)

View File

@ -1,110 +0,0 @@
START_FILE
TEXT
START_FUNC(opal_atomic_mb)
pushl %ebp
movl %esp, %ebp
leave
ret
END_FUNC(opal_atomic_mb)
START_FUNC(opal_atomic_rmb)
pushl %ebp
movl %esp, %ebp
leave
ret
END_FUNC(opal_atomic_rmb)
START_FUNC(opal_atomic_wmb)
pushl %ebp
movl %esp, %ebp
leave
ret
END_FUNC(opal_atomic_wmb)
START_FUNC(opal_atomic_cmpset_32)
pushl %ebp
movl %esp, %ebp
movl 8(%ebp), %edx
movl 16(%ebp), %ecx
movl 12(%ebp), %eax
lock; cmpxchgl %ecx,(%edx)
sete %dl
movzbl %dl, %eax
leave
ret
END_FUNC(opal_atomic_cmpset_32)
START_FUNC(opal_atomic_cmpset_64)
pushl %ebp
movl %esp, %ebp
subl $32, %esp
movl %ebx, -12(%ebp)
movl %esi, -8(%ebp)
movl %edi, -4(%ebp)
movl 8(%ebp), %edi
movl 12(%ebp), %eax
movl 16(%ebp), %edx
movl %eax, -24(%ebp)
movl %edx, -20(%ebp)
movl 20(%ebp), %eax
movl 24(%ebp), %edx
movl %eax, -32(%ebp)
movl %edx, -28(%ebp)
movl -24(%ebp), %ebx
movl -20(%ebp), %edx
movl -32(%ebp), %esi
movl -28(%ebp), %ecx
movl %ebx, %eax
push %ebx
movl %esi, %ebx
lock; cmpxchg8b (%edi)
sete %dl
pop %ebx
movzbl %dl, %eax
movl -12(%ebp), %ebx
movl -8(%ebp), %esi
movl -4(%ebp), %edi
movl %ebp, %esp
popl %ebp
ret
END_FUNC(opal_atomic_cmpset_64)
START_FUNC(opal_atomic_add_32)
pushl %ebp
movl %esp, %ebp
movl 8(%ebp), %eax
movl 12(%ebp), %edx
lock; addl %edx,(%eax)
movl (%eax), %eax
leave
ret
END_FUNC(opal_atomic_add_32)
START_FUNC(opal_atomic_sub_32)
pushl %ebp
movl %esp, %ebp
movl 8(%ebp), %eax
movl 12(%ebp), %edx
lock; subl %edx,(%eax)
movl (%eax), %eax
leave
ret
END_FUNC(opal_atomic_sub_32)
START_FUNC(opal_sys_timer_get_cycles)
pushl %ebp
movl %esp, %ebp
rdtsc
popl %ebp
ret
END_FUNC(opal_sys_timer_get_cycles)

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@ -1,109 +0,0 @@
START_FILE
.pred.safe_across_calls p1-p5,p16-p63
.text
.align 16
.global opal_atomic_mb#
.proc opal_atomic_mb#
opal_atomic_mb:
.prologue
.body
mf
br.ret.sptk.many b0
;;
.endp opal_atomic_mb#
.align 16
.global opal_atomic_rmb#
.proc opal_atomic_rmb#
opal_atomic_rmb:
.prologue
.body
mf
br.ret.sptk.many b0
;;
.endp opal_atomic_rmb#
.align 16
.global opal_atomic_wmb#
.proc opal_atomic_wmb#
opal_atomic_wmb:
.prologue
.body
mf
br.ret.sptk.many b0
;;
.endp opal_atomic_wmb#
.align 16
.global opal_atomic_cmpset_acq_32#
.proc opal_atomic_cmpset_acq_32#
opal_atomic_cmpset_acq_32:
.prologue
.body
mov ar.ccv=r33;;
cmpxchg4.acq r32=[r32],r34,ar.ccv
;;
cmp4.eq p6, p7 = r32, r33
;;
(p6) addl r8 = 1, r0
(p7) mov r8 = r0
br.ret.sptk.many b0
;;
.endp opal_atomic_cmpset_acq_32#
.align 16
.global opal_atomic_cmpset_rel_32#
.proc opal_atomic_cmpset_rel_32#
opal_atomic_cmpset_rel_32:
.prologue
.body
mov ar.ccv=r33;;
cmpxchg4.rel r32=[r32],r34,ar.ccv
;;
cmp4.eq p6, p7 = r32, r33
;;
(p6) addl r8 = 1, r0
(p7) mov r8 = r0
br.ret.sptk.many b0
;;
.endp opal_atomic_cmpset_rel_32#
.align 16
.global opal_atomic_cmpset_acq_64#
.proc opal_atomic_cmpset_acq_64#
opal_atomic_cmpset_acq_64:
.prologue
.body
mov ar.ccv=r33;;
cmpxchg8.acq r32=[r32],r34,ar.ccv
;;
cmp.eq p6, p7 = r33, r32
;;
(p6) addl r8 = 1, r0
(p7) mov r8 = r0
br.ret.sptk.many b0
;;
.endp opal_atomic_cmpset_acq_64#
.align 16
.global opal_atomic_cmpset_rel_64#
.proc opal_atomic_cmpset_rel_64#
opal_atomic_cmpset_rel_64:
.prologue
.body
mov ar.ccv=r33;;
cmpxchg8.rel r32=[r32],r34,ar.ccv
;;
cmp.eq p6, p7 = r33, r32
;;
(p6) addl r8 = 1, r0
(p7) mov r8 = r0
br.ret.sptk.many b0
;;
.endp opal_atomic_cmpset_rel_64#
.align 16
.global opal_sys_timer_get_cycles#
.proc opal_sys_timer_get_cycles#
opal_sys_timer_get_cycles:
.prologue
.body
mov r8=ar.itc
br.ret.sptk.many b0
;;
.endp opal_sys_timer_get_cycles#
.ident "GCC: (GNU) 3.2.3 20030502 (Red Hat Linux 3.2.3-49)"

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@ -1,196 +0,0 @@
START_FILE
#ifdef __linux__
#include <sys/asm.h>
#else
#include <asm.h>
#endif
#include <regdef.h>
TEXT
ALIGN(8)
LEAF(opal_atomic_mb)
#ifdef __linux__
.set mips2
#endif
sync
#ifdef __linux__
.set mips0
#endif
j ra
END(opal_atomic_mb)
ALIGN(8)
LEAF(opal_atomic_rmb)
#ifdef __linux__
.set mips2
#endif
sync
#ifdef __linux__
.set mips0
#endif
j ra
END(opal_atomic_rmb)
LEAF(opal_atomic_wmb)
#ifdef __linux__
.set mips2
#endif
sync
#ifdef __linux__
.set mips0
#endif
j ra
END(opal_atomic_wmb)
LEAF(opal_atomic_cmpset_32)
.set noreorder
retry1:
#ifdef __linux__
.set mips2
#endif
ll $3, 0($4)
#ifdef __linux__
.set mips0
#endif
bne $3, $5, done1
or $2, $6, 0
#ifdef __linux__
.set mips2
#endif
sc $2, 0($4)
#ifdef __linux__
.set mips0
#endif
beqz $2, retry1
done1:
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_32)
LEAF(opal_atomic_cmpset_acq_32)
.set noreorder
retry2:
#ifdef __linux__
.set mips2
#endif
ll $3, 0($4)
#ifdef __linux__
.set mips0
#endif
bne $3, $5, done2
or $2, $6, 0
#ifdef __linux__
.set mips2
#endif
sc $2, 0($4)
#ifdef __linux__
.set mips0
#endif
beqz $2, retry2
done2:
#ifdef __linux__
.set mips2
#endif
sync
#ifdef __linux__
.set mips0
#endif
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_acq_32)
LEAF(opal_atomic_cmpset_rel_32)
.set noreorder
#ifdef __linux__
.set mips2
#endif
sync
#ifdef __linux__
.set mips0
#endif
retry3:
#ifdef __linux__
.set mips2
#endif
ll $3, 0($4)
#ifdef __linux__
.set mips0
#endif
bne $3, $5, done3
or $2, $6, 0
#ifdef __linux__
.set mips2
#endif
sc $2, 0($4)
#ifdef __linux__
.set mips0
#endif
beqz $2, retry3
done3:
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_rel_32)
#ifdef __mips64
LEAF(opal_atomic_cmpset_64)
.set noreorder
retry4:
lld $3, 0($4)
bne $3, $5, done4
or $2, $6, 0
scd $2, 0($4)
beqz $2, retry4
done4:
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_64)
LEAF(opal_atomic_cmpset_acq_64)
.set noreorder
retry5:
lld $3, 0($4)
bne $3, $5, done5
or $2, $6, 0
scd $2, 0($4)
beqz $2, retry5
done5:
sync
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_acq_64)
LEAF(opal_atomic_cmpset_rel_64)
.set noreorder
sync
retry6:
lld $3, 0($4)
bne $3, $5, done6
or $2, $6, 0
scd $2, 0($4)
beqz $2, retry6
done6:
xor $3,$3,$5
j ra
sltu $2,$3,1
.set reorder
END(opal_atomic_cmpset_rel_64)
#endif /* __mips64 */

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@ -1,168 +0,0 @@
START_FILE
TEXT
ALIGN(4)
START_FUNC(opal_atomic_mb)
sync
blr
END_FUNC(opal_atomic_mb)
START_FUNC(opal_atomic_rmb)
lwsync
blr
END_FUNC(opal_atomic_rmb)
START_FUNC(opal_atomic_wmb)
eieio
blr
END_FUNC(opal_atomic_wmb)
START_FUNC(opal_atomic_cmpset_32)
LSYM(1) lwarx r0, 0, r3
cmpw 0, r0, r4
bne- REFLSYM(2)
stwcx. r5, 0, r3
bne- REFLSYM(1)
LSYM(2)
xor r3,r0,r4
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_32)
START_FUNC(opal_atomic_cmpset_acq_32)
LSYM(3) lwarx r0, 0, r3
cmpw 0, r0, r4
bne- REFLSYM(4)
stwcx. r5, 0, r3
bne- REFLSYM(3)
sync
LSYM(4)
xor r3,r0,r4
subfic r5,r3,0
adde r3,r5,r3
lwsync
blr
END_FUNC(opal_atomic_cmpset_acq_32)
START_FUNC(opal_atomic_cmpset_rel_32)
eieio
LSYM(5) lwarx r0, 0, r3
cmpw 0, r0, r4
bne- REFLSYM(6)
stwcx. r5, 0, r3
bne- REFLSYM(5)
sync
LSYM(6)
xor r3,r0,r4
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_rel_32)
#START_64BIT
START_FUNC(opal_atomic_cmpset_64)
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
LSYM(7) ldarx r9, 0, r3
cmpd 0, r9, r5
bne- REFLSYM(8)
stdcx. r7, 0, r3
bne- REFLSYM(7)
LSYM(8)
xor r3,r5,r9
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_64)
START_FUNC(opal_atomic_cmpset_acq_64)
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
LSYM(9) ldarx r9, 0, r3
cmpd 0, r9, r5
bne- REFLSYM(10)
stdcx. r7, 0, r3
bne- REFLSYM(9)
LSYM(10)
xor r3,r5,r9
subfic r5,r3,0
adde r3,r5,r3
blr
lwsync
blr
END_FUNC(opal_atomic_cmpset_acq_64)
START_FUNC(opal_atomic_cmpset_rel_64)
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
eieio
LSYM(11) ldarx r9, 0, r3
cmpd 0, r9, r5
bne- REFLSYM(12)
stdcx. r7, 0, r3
bne- REFLSYM(11)
LSYM(12)
xor r3,r5,r9
subfic r5,r3,0
adde r3,r5,r3
blr
lwsync
blr
END_FUNC(opal_atomic_cmpset_rel_64)
#END_64BIT
START_FUNC(opal_atomic_add_32)
LSYM(13) lwarx r0, 0, r3
add r0, r4, r0
stwcx. r0, 0, r3
bne- REFLSYM(13)
mr r3,r0
blr
END_FUNC(opal_atomic_add_32)
START_FUNC(opal_atomic_sub_32)
LSYM(14) lwarx r0,0,r3
subf r0,r4,r0
stwcx. r0,0,r3
bne- REFLSYM(14)
mr r3,r0
blr
END_FUNC(opal_atomic_sub_32)
START_FUNC(opal_sys_timer_get_cycles)
LSYM(15)
mftbu r0
mftb r11
mftbu r2
cmpw cr7,r2,r0
bne+ cr7,REFLSYM(15)
li r4,0
li r9,0
or r3,r2,r9
or r4,r4,r11
blr
END_FUNC(opal_sys_timer_get_cycles)

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@ -1,157 +0,0 @@
START_FILE
TEXT
ALIGN(4)
START_FUNC(opal_atomic_mb)
sync
blr
END_FUNC(opal_atomic_mb)
START_FUNC(opal_atomic_rmb)
lwsync
blr
END_FUNC(opal_atomic_rmb)
START_FUNC(opal_atomic_wmb)
eieio
blr
END_FUNC(opal_atomic_wmb)
START_FUNC(opal_atomic_cmpset_32)
LSYM(1) lwarx r0, 0, r3
cmpw 0, r0, r4
bne- REFLSYM(2)
stwcx. r5, 0, r3
bne- REFLSYM(1)
LSYM(2)
cmpw cr7,r0,r4
mfcr r3
rlwinm r3,r3,31,1
blr
END_FUNC(opal_atomic_cmpset_32)
START_FUNC(opal_atomic_cmpset_acq_32)
mflr r0
std r29,-24(r1)
std r0,16(r1)
stdu r1,-144(r1)
bl REFGSYM(opal_atomic_cmpset_32)
mr r29,r3
bl REFGSYM(opal_atomic_rmb)
mr r3,r29
addi r1,r1,144
ld r0,16(r1)
mtlr r0
ld r29,-24(r1)
blr
END_FUNC(opal_atomic_cmpset_acq_32)
START_FUNC(opal_atomic_cmpset_rel_32)
mflr r0
std r27,-40(r1)
std r28,-32(r1)
std r29,-24(r1)
std r0,16(r1)
stdu r1,-160(r1)
mr r29,r3
mr r28,r4
mr r27,r5
bl REFGSYM(opal_atomic_wmb)
mr r3,r29
mr r4,r28
mr r5,r27
bl REFGSYM(opal_atomic_cmpset_32)
addi r1,r1,160
ld r0,16(r1)
mtlr r0
ld r27,-40(r1)
ld r28,-32(r1)
ld r29,-24(r1)
blr
END_FUNC(opal_atomic_cmpset_rel_32)
START_FUNC(opal_atomic_cmpset_64)
LSYM(3) ldarx r0, 0, r3
cmpd 0, r0, r4
bne- REFLSYM(4)
stdcx. r5, 0, r3
bne- REFLSYM(3)
LSYM(4)
xor r3,r4,r0
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_64)
START_FUNC(opal_atomic_cmpset_acq_64)
LSYM(7) ldarx r0, 0, r3
cmpd 0, r0, r4
bne- REFLSYM(8)
stdcx. r5, 0, r3
bne- REFLSYM(7)
LSYM(8)
lwsync
xor r3,r4,r0
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_acq_64)
START_FUNC(opal_atomic_cmpset_rel_64)
eieio
LSYM(9) ldarx r0, 0, r3
cmpd 0, r0, r4
bne- REFLSYM(10)
stdcx. r5, 0, r3
bne- REFLSYM(9)
LSYM(10)
xor r3,r4,r0
subfic r5,r3,0
adde r3,r5,r3
blr
END_FUNC(opal_atomic_cmpset_rel_64)
START_FUNC(opal_atomic_add_32)
LSYM(5) lwarx r0, 0, r3
add r0, r4, r0
stwcx. r0, 0, r3
bne- REFLSYM(5)
mr r3,r0
blr
END_FUNC(opal_atomic_add_32)
START_FUNC(opal_atomic_sub_32)
LSYM(6) lwarx r0,0,r3
subf r0,r4,r0
stwcx. r0,0,r3
bne- REFLSYM(6)
mr r3,r0
blr
END_FUNC(opal_atomic_sub_32)
START_FUNC(opal_sys_timer_get_cycles)
LSYM(11)
mftbu r2
rldicl r2,r2,0,32
mftb r0
rldicl r9,r0,0,32
mftbu r0
rldicl r0,r0,0,32
cmpw cr7,r0,r2
bne cr7,REFLSYM(11)
sldi r3,r0,32
or r3,r3,r9
blr
END_FUNC(opal_sys_timer_get_cycles)

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@ -1,171 +0,0 @@
START_FILE
TEXT
ALIGN(4)
START_FUNC(opal_atomic_mb)
!#PROLOGUE# 0
!#PROLOGUE# 1
membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad
retl
nop
END_FUNC(opal_atomic_mb)
START_FUNC(opal_atomic_rmb)
!#PROLOGUE# 0
!#PROLOGUE# 1
membar #LoadLoad
retl
nop
END_FUNC(opal_atomic_rmb)
START_FUNC(opal_atomic_wmb)
!#PROLOGUE# 0
!#PROLOGUE# 1
membar #StoreStore
retl
nop
END_FUNC(opal_atomic_wmb)
START_FUNC(opal_atomic_cmpset_32)
!#PROLOGUE# 0
!#PROLOGUE# 1
casa [%o0] 0x80, %o1, %o2
xor %o2, %o1, %o2
subcc %g0, %o2, %g0
retl
subx %g0, -1, %o0
END_FUNC(opal_atomic_cmpset_32)
START_FUNC(opal_atomic_cmpset_acq_32)
!#PROLOGUE# 0
!#PROLOGUE# 1
casa [%o0] 0x80, %o1, %o2
xor %o2, %o1, %o2
subcc %g0, %o2, %g0
subx %g0, -1, %o0
membar #LoadLoad
retl
sra %o0, 0, %o0
END_FUNC(opal_atomic_cmpset_acq_32)
START_FUNC(opal_atomic_cmpset_rel_32)
!#PROLOGUE# 0
!#PROLOGUE# 1
membar #StoreStore
casa [%o0] 0x80, %o1, %o2
xor %o2, %o1, %o2
subcc %g0, %o2, %g0
retl
subx %g0, -1, %o0
END_FUNC(opal_atomic_cmpset_rel_32)
START_FUNC(opal_atomic_cmpset_64)
!#PROLOGUE# 0
save %sp, -128, %sp
!#PROLOGUE# 1
mov %i3, %o4
mov %i4, %o5
st %i1, [%fp-32]
st %i2, [%fp-28]
std %o4, [%fp-24]
ldx [%fp-24], %g1
ldx [%fp-32], %g2
casxa [%i0] 0x80, %g2, %g1
stx %g1, [%fp-24]
ld [%fp-24], %i5
ld [%fp-32], %g1
cmp %i5, %g1
bne REFLSYM(12)
mov 0, %i0
ld [%fp-20], %i2
ld [%fp-28], %i1
cmp %i2, %i1
be,a REFLSYM(12)
mov 1, %i0
LSYM(12)
ret
restore
END_FUNC(opal_atomic_cmpset_64)
START_FUNC(opal_atomic_cmpset_acq_64)
!#PROLOGUE# 0
save %sp, -128, %sp
!#PROLOGUE# 1
mov %i1, %o4
mov %i2, %o5
mov %i3, %o2
mov %i4, %o3
std %o4, [%fp-32]
std %o2, [%fp-24]
ldx [%fp-24], %g1
ldx [%fp-32], %g2
casxa [%i0] 0x80, %g2, %g1
stx %g1, [%fp-24]
ld [%fp-24], %i5
ld [%fp-32], %g1
cmp %i5, %g1
bne REFLSYM(16)
mov 0, %i0
ld [%fp-20], %i2
ld [%fp-28], %i1
cmp %i2, %i1
be,a REFLSYM(16)
mov 1, %i0
LSYM(16)
membar #LoadLoad
ret
restore
END_FUNC(opal_atomic_cmpset_acq_64)
START_FUNC(opal_atomic_cmpset_rel_64)
!#PROLOGUE# 0
save %sp, -128, %sp
!#PROLOGUE# 1
mov %i1, %o4
mov %i2, %o5
mov %i3, %o2
mov %i4, %o3
membar #StoreStore
std %o4, [%fp-32]
std %o2, [%fp-24]
ldx [%fp-24], %g1
ldx [%fp-32], %g2
casxa [%i0] 0x80, %g2, %g1
stx %g1, [%fp-24]
ld [%fp-24], %i5
ld [%fp-32], %g1
cmp %i5, %g1
bne REFLSYM(21)
mov 0, %i0
ld [%fp-20], %i2
ld [%fp-28], %i1
cmp %i2, %i1
be,a REFLSYM(21)
mov 1, %i0
LSYM(21)
ret
restore
END_FUNC(opal_atomic_cmpset_rel_64)
START_FUNC(opal_sys_timer_get_cycles)
save %sp,-96,%sp
rd %tick,%o0
srlx %o0,32,%o1
or %g0,%o1,%i0
ret ! Result = %i0
restore %o0,0,%o1
END_FUNC(opal_sys_timer_get_cycles)

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@ -1,111 +0,0 @@
START_FILE
TEXT
ALIGN(4)