* Add memory barriers for shared memory. Rich and I think we got them
all and the Intel tests pass slightly oversubscribed. This commit was SVN r7431.
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README
7
README
@ -60,13 +60,6 @@ base as of this writing (26 Aug 2005):
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- LAM/MPI-like mpirun notation of "C" and "N" is not yet supported.
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- LAM/MPI-like mpirun notation of "C" and "N" is not yet supported.
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- Shared memory support will not function properly on machines that
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have a weak memory consistency mode. The default in this beta is to
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disable shared memory support on all Power PC architectures, even
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though some Power PC platforms have strong memory consistency
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models. See the description of the --enable-ptl-sm configure flag,
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below.
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- Striping MPI messages across multiple networks is supported (and
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- Striping MPI messages across multiple networks is supported (and
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happens automatically when multiple networks are available), but
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happens automatically when multiple networks are available), but
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needs performance tuning.
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needs performance tuning.
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@ -18,9 +18,9 @@
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#define _OMPI_CIRCULAR_BUFFER_FIFO
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#define _OMPI_CIRCULAR_BUFFER_FIFO
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#include "ompi/include/constants.h"
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#include "ompi/include/constants.h"
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#include "include/sys/cache.h"
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#include "opal/include/sys/cache.h"
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#include "include/sys/atomic.h"
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#include "opal/include/sys/atomic.h"
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#include "mca/mpool/mpool.h"
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#include "ompi/mca/mpool/mpool.h"
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#include "opal/util/pow2.h"
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#include "opal/util/pow2.h"
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@ -304,6 +304,7 @@ static inline int ompi_cb_fifo_write_to_head(void *data, ompi_cb_fifo_t
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if (ptr[index] == OMPI_CB_FREE) {
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if (ptr[index] == OMPI_CB_FREE) {
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slot = index;
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slot = index;
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ptr[slot] = data;
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ptr[slot] = data;
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opal_atomic_wmb();
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index) &= fifo->mask;
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(h_ptr->fifo_index) &= fifo->mask;
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}
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}
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@ -337,6 +338,7 @@ static inline int ompi_cb_fifo_get_slot(ompi_cb_fifo_t *fifo,
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if ( OMPI_CB_FREE == ptr[index] ) {
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if ( OMPI_CB_FREE == ptr[index] ) {
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ptr[index] = OMPI_CB_RESERVED;
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ptr[index] = OMPI_CB_RESERVED;
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return_value = index;
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return_value = index;
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opal_atomic_wmb();
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index) &= fifo->mask;
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(h_ptr->fifo_index) &= fifo->mask;
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}
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}
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@ -622,6 +624,7 @@ static inline int ompi_cb_fifo_write_to_head_same_base_addr(void *data, ompi_cb_
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if (ptr[index] == OMPI_CB_FREE) {
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if (ptr[index] == OMPI_CB_FREE) {
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slot = index;
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slot = index;
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ptr[slot] = data;
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ptr[slot] = data;
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opal_atomic_wmb();
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index)++;
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/* wrap around */
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/* wrap around */
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(h_ptr->fifo_index) &= fifo->mask;
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(h_ptr->fifo_index) &= fifo->mask;
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@ -655,6 +658,7 @@ static inline int ompi_cb_fifo_get_slot_same_base_addr(ompi_cb_fifo_t *fifo)
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if ( OMPI_CB_FREE == ptr[index] ) {
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if ( OMPI_CB_FREE == ptr[index] ) {
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ptr[index] = OMPI_CB_RESERVED;
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ptr[index] = OMPI_CB_RESERVED;
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return_value = index;
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return_value = index;
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opal_atomic_wmb();
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index)++;
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(h_ptr->fifo_index) &= fifo->mask;
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(h_ptr->fifo_index) &= fifo->mask;
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}
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}
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@ -433,8 +433,8 @@ int mca_btl_sm_add_procs_same_base_addr(
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fifo_tmp=(ompi_fifo_t * volatile *)
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fifo_tmp=(ompi_fifo_t * volatile *)
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( (char *)(mca_btl_sm_component.sm_ctl_header->fifo) +
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( (char *)(mca_btl_sm_component.sm_ctl_header->fifo) +
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(long)(mca_btl_sm_component.sm_mpool->mpool_base(mca_btl_sm_component.sm_mpool)) );
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(long)(mca_btl_sm_component.sm_mpool->mpool_base(mca_btl_sm_component.sm_mpool)) );
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/* RLG : need memory barrier */
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fifo_tmp[mca_btl_sm_component.my_smp_rank]=my_fifos;
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fifo_tmp[mca_btl_sm_component.my_smp_rank]=my_fifos;
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opal_atomic_mb();
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/* cache the pointer to the 2d fifo array. These addresses
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/* cache the pointer to the 2d fifo array. These addresses
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* are valid in the current process space */
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* are valid in the current process space */
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