asm: remove support for Sparc v9
This commit removes the specialized support for Sparc v9 as the architecture is unsupported. The architecture will continue to work without CMA and using the GCC built-in atomic support. Signed-off-by: Nathan Hjelm <hjelmn@google.com>
Этот коммит содержится в:
Nathan Hjelm
родитель
038dcad8b5
Коммит
d2dd27b008
@ -926,29 +926,6 @@ AC_DEFUN([OPAL_CHECK_POWERPC_64BIT],[
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])dnl
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dnl #################################################################
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dnl
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dnl OPAL_CHECK_SPARCV8PLUS
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dnl
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dnl #################################################################
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AC_DEFUN([OPAL_CHECK_SPARCV8PLUS],[
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AC_MSG_CHECKING([if have Sparc v8+/v9 support])
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sparc_result=0
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OPAL_TRY_ASSEMBLE([$opal_cv_asm_text
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casa [%o0] 0x80, %o1, %o2],
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[sparc_result=1],
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[sparc_result=0])
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if test "$sparc_result" = "1" ; then
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AC_MSG_RESULT([yes])
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ifelse([$1],,:,[$1])
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else
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AC_MSG_RESULT([no])
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ifelse([$2],,:,[$2])
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fi
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unset sparc_result
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])dnl
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dnl #################################################################
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dnl
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dnl OPAL_CHECK_CMPXCHG16B
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@ -1214,34 +1191,6 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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fi
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OPAL_GCC_INLINE_ASSIGN='"1: li %0,0" : "=&r"(ret)'
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;;
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sparc*-*)
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# SPARC v9 (and above) are the only ones with 64bit support
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# if compiling 32 bit, see if we are v9 (aka v8plus) or
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# earlier (casa is v8+/v9).
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if test "$ac_cv_sizeof_long" = "4" ; then
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have_v8plus=0
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OPAL_CHECK_SPARCV8PLUS([have_v8plus=1])
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if test "$have_v8plus" = "0" ; then
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OPAL_ASM_SUPPORT_64BIT=0
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opal_cv_asm_arch="SPARC"
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AC_MSG_WARN([Sparc v8 target is not supported in this release of Open MPI.])
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AC_MSG_WARN([You must specify the target architecture v8plus to compile])
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AC_MSG_WARN([Open MPI in 32 bit mode on Sparc processors (see the README).])
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AC_MSG_ERROR([Can not continue.])
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else
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OPAL_ASM_SUPPORT_64BIT=1
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opal_cv_asm_arch="SPARCV9_32"
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fi
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elif test "$ac_cv_sizeof_long" = "8" ; then
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OPAL_ASM_SUPPORT_64BIT=1
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opal_cv_asm_arch="SPARCV9_64"
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else
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AC_MSG_ERROR([Could not determine Sparc word size: $ac_cv_sizeof_long])
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fi
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OPAL_GCC_INLINE_ASSIGN='"mov 0,%0" : "=&r"(ret)'
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;;
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*)
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if test $opal_cv_have___atomic = "yes" ; then
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opal_cv_asm_builtin="BUILTIN_GCC"
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@ -38,5 +38,4 @@ include opal/sys/arm/Makefile.am
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include opal/sys/arm64/Makefile.am
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include opal/sys/ia32/Makefile.am
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include opal/sys/powerpc/Makefile.am
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include opal/sys/sparcv9/Makefile.am
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include opal/sys/gcc_builtin/Makefile.am
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@ -36,9 +36,6 @@
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#define OPAL_X86_64 0030
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#define OPAL_POWERPC32 0050
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#define OPAL_POWERPC64 0051
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#define OPAL_SPARC 0060
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#define OPAL_SPARCV9_32 0061
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#define OPAL_SPARCV9_64 0062
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#define OPAL_ARM 0100
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#define OPAL_ARM64 0101
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#define OPAL_BUILTIN_GCC 0202
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@ -180,12 +180,6 @@ enum {
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#include "opal/sys/powerpc/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_POWERPC64
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#include "opal/sys/powerpc/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_SPARC
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#include "opal/sys/sparc/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_32
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#include "opal/sys/sparcv9/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64
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#include "opal/sys/sparcv9/atomic.h"
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#endif
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#ifndef DOXYGEN
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@ -1,23 +0,0 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2005 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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#
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# $HEADER$
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#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += \
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opal/sys/sparcv9/atomic.h \
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opal/sys/sparcv9/timer.h
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@ -1,202 +0,0 @@
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/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2007 Sun Microsystems, Inc. All rights reserverd.
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* Copyright (c) 2016 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* Copyright (c) 2017-2018 Los Alamos National Security, LLC. All rights
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* reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OPAL_SYS_ARCH_ATOMIC_H
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#define OPAL_SYS_ARCH_ATOMIC_H 1
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/*
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* On sparc v9, use casa and casxa (compare and swap) instructions.
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*/
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#define ASI_P "0x80"
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#define MEMBAR(type) __asm__ __volatile__ ("membar " type : : : "memory")
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/**********************************************************************
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*
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* Define constants for Sparc v9 (Ultra Sparc)
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_32 1
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#define OPAL_HAVE_ATOMIC_COMPARE_EXCHANGE_64 1
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline void opal_atomic_mb(void)
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{
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MEMBAR("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad");
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}
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static inline void opal_atomic_rmb(void)
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{
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MEMBAR("#LoadLoad");
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}
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static inline void opal_atomic_wmb(void)
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{
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MEMBAR("#StoreStore");
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}
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static inline void opal_atomic_isync(void)
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{
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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/**********************************************************************
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*
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* Atomic math operations
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline bool opal_atomic_compare_exchange_strong_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
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{
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/* casa [reg(rs1)] %asi, reg(rs2), reg(rd)
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*
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* if (*(reg(rs1)) == reg(rs2) )
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* swap reg(rd), *(reg(rs1))
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* else
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* reg(rd) = *(reg(rs1))
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*/
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int32_t prev = newval;
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bool ret;
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__asm__ __volatile__("casa [%1] " ASI_P ", %2, %0"
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: "+r" (prev)
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: "r" (addr), "r" (*oldval));
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ret = (prev == *oldval);
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*oldval = prev;
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return ret;
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}
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static inline bool opal_atomic_compare_exchange_strong_acq_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
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{
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bool rc;
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rc = opal_atomic_compare_exchange_strong_32 (addr, oldval, newval);
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opal_atomic_rmb();
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return rc;
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}
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static inline bool opal_atomic_compare_exchange_strong_rel_32 (opal_atomic_int32_t *addr, int32_t *oldval, int32_t newval)
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{
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opal_atomic_wmb();
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return opal_atomic_compare_exchange_strong_32 (addr, oldval, newval);
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}
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#if OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64
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static inline bool opal_atomic_compare_exchange_strong_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
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{
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/* casa [reg(rs1)] %asi, reg(rs2), reg(rd)
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*
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* if (*(reg(rs1)) == reg(rs1) )
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* swap reg(rd), *(reg(rs1))
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* else
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* reg(rd) = *(reg(rs1))
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*/
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int64_t prev = newval;
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bool ret;
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__asm__ __volatile__("casxa [%1] " ASI_P ", %2, %0"
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: "+r" (prev)
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: "r" (addr), "r" (*oldval));
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ret = (prev == *oldval);
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*oldval = prev;
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return ret;
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}
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#else /* OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64 */
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static inline bool opal_atomic_compare_exchange_strong_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
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{
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/* casa [reg(rs1)] %asi, reg(rs2), reg(rd)
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*
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* if (*(reg(rs1)) == reg(rs1) )
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* swap reg(rd), *(reg(rs1))
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* else
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* reg(rd) = *(reg(rs1))
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*
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*/
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int64_t prev = newval;
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bool ret;
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__asm__ __volatile__(
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"ldx %0, %%g1 \n\t" /* g1 = ret */
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"ldx %2, %%g2 \n\t" /* g2 = oldval */
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"casxa [%1] " ASI_P ", %%g2, %%g1 \n\t"
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"stx %%g1, %0 \n"
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: "+m"(prev)
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: "r"(addr), "m"(*oldval)
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: "%g1", "%g2"
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);
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ret = (prev == *oldval);
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*oldval = prev;
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return ret;
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}
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#endif /* OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64 */
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static inline bool opal_atomic_compare_exchange_strong_acq_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
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{
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bool rc;
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rc = opal_atomic_compare_exchange_strong_64 (addr, oldval, newval);
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opal_atomic_rmb();
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return rc;
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}
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static inline bool opal_atomic_compare_exchange_strong_rel_64 (opal_atomic_int64_t *addr, int64_t *oldval, int64_t newval)
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{
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opal_atomic_wmb();
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return opal_atomic_compare_exchange_strong_64 (addr, oldval, newval);
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */
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@ -1,67 +0,0 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
|
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* Copyright (c) 2004-2005 The University of Tennessee and The University
|
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* of Tennessee Research Foundation. All rights
|
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* reserved.
|
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
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* University of Stuttgart. All rights reserved.
|
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OPAL_SYS_ARCH_TIMER_H
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#define OPAL_SYS_ARCH_TIMER_H 1
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typedef uint64_t opal_timer_t;
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#if OPAL_GCC_INLINE_ASSEMBLY
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#if OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64
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static inline opal_timer_t
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opal_sys_timer_get_cycles(void)
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{
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opal_timer_t ret;
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__asm__ __volatile__("rd %%tick, %0" : "=r"(ret));
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return ret;
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}
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#else /* OPAL_SPARCV9_32 */
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static inline opal_timer_t
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opal_sys_timer_get_cycles(void)
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{
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opal_timer_t ret;
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int a, b;
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__asm__ __volatile__("rd %%tick, %0 \n"
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"srlx %0, 32, %1 " :
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"=r"(a), "=r"(b)
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);
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ret = (0x00000000FFFFFFFF & a) | (((opal_timer_t) b) << 32);
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return ret;
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}
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#endif
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#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
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#else
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#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 0
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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#endif /* ! OPAL_SYS_ARCH_TIMER_H */
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@ -1,37 +0,0 @@
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#!/bin/sh
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
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# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
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# Additional copyrights may follow
|
||||
#
|
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# $HEADER$
|
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#
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CFILE=/tmp/opal_atomic_$$.c
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trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
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echo Updating atomic.s from atomic.h using gcc
|
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cat > $CFILE<<EOF
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#include "../architecture.h"
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#include <stdlib.h>
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#include <inttypes.h>
|
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#define static
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#define inline
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#define OPAL_GCC_INLINE_ASSEMBLY 1
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#include "atomic.h"
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EOF
|
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gcc -m64 -O3 -DOPAL_ASSEMBLY_ARCH=OPAL_SPARCV9_64 -I. -S $CFILE -o atomic64.s
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gcc -mv8plus -DOPAL_ASSEMBLY_ARCH=OPAL_SPARCV9_32 -O3 -I. -S $CFILE -o atomic32.s
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@ -84,10 +84,6 @@ BEGIN_C_DECLS
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#include "opal/sys/powerpc/timer.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_POWERPC64
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#include "opal/sys/powerpc/timer.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_32
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#include "opal/sys/sparcv9/timer.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_SPARCV9_64
|
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#include "opal/sys/sparcv9/timer.h"
|
||||
#endif
|
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#ifndef DOXYGEN
|
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