Patch from Evan Clinton, reviewed by Leif Lindholm, for supporting
ARM5 and ARM6. This commit was SVN r26361.
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Коммит
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@ -915,6 +915,28 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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armv7*)
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armv7*)
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ompi_cv_asm_arch="ARM"
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ompi_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_ASM_ARM_VERSION=7
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AC_DEFINE_UNQUOTED([OPAL_ASM_ARM_VERSION], [$OPAL_ASM_ARM_VERSION],
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[What ARM assembly version to use])
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OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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;;
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armv6*)
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ompi_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=0
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OPAL_ASM_ARM_VERSION=6
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AC_DEFINE_UNQUOTED([OPAL_ASM_ARM_VERSION], [$OPAL_ASM_ARM_VERSION],
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[What ARM assembly version to use])
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OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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;;
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armv5*linux*|armv4*linux*)
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# uses Linux kernel helpers for some atomic operations
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ompi_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=0
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OPAL_ASM_ARM_VERSION=5
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AC_DEFINE_UNQUOTED([OPAL_ASM_ARM_VERSION], [$OPAL_ASM_ARM_VERSION],
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[What ARM assembly version to use])
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OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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;;
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;;
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@ -18,46 +18,67 @@
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* $HEADER$
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* $HEADER$
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*/
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*/
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/*
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* ARMv5 and earlier lack robust atomic operations and therefore this file uses
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* Linux kernel support where needed. The kernel also provides memory barriers
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* and this file uses them for ARMv5 and earlier processors, which lack the
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* memory barrier instruction. These kernel functions are available on kernel
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* versions 2.6.15 and greater; using them will result in undefined behavior on
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* older kernels.
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* See Documentation/arm/kernel_user_helpers.txt in the kernel tree for details
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*/
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#ifndef OMPI_SYS_ARCH_ATOMIC_H
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#ifndef OMPI_SYS_ARCH_ATOMIC_H
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#define OMPI_SYS_ARCH_ATOMIC_H 1
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#define OMPI_SYS_ARCH_ATOMIC_H 1
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#if OPAL_WANT_SMP_LOCKS
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#if OPAL_WANT_SMP_LOCKS
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#if (OPAL_ASM_ARM_VERSION >= 7)
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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/* use the DMB instruction if available... */
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#define MB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define MB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define RMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define RMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define WMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define WMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#elif (OPAL_ASM_ARM_VERSION == 6)
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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/* ...or the v6-specific equivalent... */
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#define MB() __asm__ __volatile__ ("mcr p15, 0, r0, c7, c10, 5" : : : "memory")
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#define RMB() MB()
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#define WMB() MB()
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#else
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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/* ...otherwise use the Linux kernel-provided barrier */
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#define MB() (*((void (*)(void))(0xffff0fa0)))()
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#define RMB() MB()
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#define WMB() MB()
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#endif
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#else
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#else
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#define MB()
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#define MB()
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#define RMB()
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#define RMB()
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#define WMB()
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#define WMB()
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#endif
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#endif /* OPAL_WANT_SMP_LOCKS */
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/**********************************************************************
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*
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* Define constants for ARMv7
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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#define OPAL_HAVE_ATOMIC_MATH_32 1
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#define OPAL_HAVE_ATOMIC_ADD_32 1
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#define OPAL_HAVE_ATOMIC_SUB_32 1
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/**********************************************************************
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/**********************************************************************
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*
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*
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* Memory Barriers
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* Memory Barriers
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*
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*
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*********************************************************************/
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*********************************************************************/
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#if OMPI_GCC_INLINE_ASSEMBLY
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#if (OPAL_HAVE_ATOMIC_MEM_BARRIER == 1)
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static inline
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static inline
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void opal_atomic_mb(void)
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void opal_atomic_mb(void)
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@ -79,6 +100,8 @@ void opal_atomic_wmb(void)
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WMB();
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WMB();
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}
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}
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#endif
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/**********************************************************************
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/**********************************************************************
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*
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*
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@ -86,6 +109,10 @@ void opal_atomic_wmb(void)
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*
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*
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*********************************************************************/
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*********************************************************************/
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#if (OMPI_GCC_INLINE_ASSEMBLY && (OPAL_ASM_ARM_VERSION >= 6))
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_MATH_32 1
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static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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int32_t oldval, int32_t newval)
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{
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{
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@ -131,7 +158,9 @@ static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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return opal_atomic_cmpset_32(addr, oldval, newval);
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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}
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#if (OPAL_ASM_SUPPORT_64BIT == 1)
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
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static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval)
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int64_t oldval, int64_t newval)
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{
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{
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@ -181,7 +210,10 @@ static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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return opal_atomic_cmpset_64(addr, oldval, newval);
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return opal_atomic_cmpset_64(addr, oldval, newval);
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}
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}
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#endif
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#define OPAL_HAVE_ATOMIC_ADD_32 1
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static inline int32_t opal_atomic_add_32(volatile int32_t* v, int inc)
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static inline int32_t opal_atomic_add_32(volatile int32_t* v, int inc)
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{
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{
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int32_t t;
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int32_t t;
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@ -202,7 +234,7 @@ static inline int32_t opal_atomic_add_32(volatile int32_t* v, int inc)
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return t;
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return t;
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}
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}
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#define OPAL_HAVE_ATOMIC_SUB_32 1
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static inline int32_t opal_atomic_sub_32(volatile int32_t* v, int dec)
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static inline int32_t opal_atomic_sub_32(volatile int32_t* v, int dec)
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{
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{
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int32_t t;
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int32_t t;
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@ -222,7 +254,30 @@ static inline int32_t opal_atomic_sub_32(volatile int32_t* v, int dec)
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return t;
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return t;
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}
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}
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#else /* OPAL_ASM_ARM_VERSION <=5 or no GCC inline assembly */
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define __kuser_cmpxchg (*((int (*)(int, int, volatile int*))(0xffff0fc0)))
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static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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return !(__kuser_cmpxchg(oldval, newval, addr));
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}
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static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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/* kernel function includes all necessary memory barriers */
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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/* kernel function includes all necessary memory barriers */
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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#endif
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#endif /* ! OMPI_SYS_ARCH_ATOMIC_H */
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#endif /* ! OMPI_SYS_ARCH_ATOMIC_H */
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