asm: rename the AMD64 into X86_64

in this context, AMD64 really means amd64 or em64t, so let's rename this into X86_64 in order to avoid any confusion Signed-off-by: Gilles Gouaillardet <gilles@rist.or.jp>
2017-02-27 15:09:52 +09:00 · 2017-02-27 15:09:52 +09:00 · af0b5cffb4
--- a/config/opal_config_asm.m4
+++ b/config/opal_config_asm.m4
@ -1004,7 +1004,7 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
        OPAL_ASM_SUPPORT_64BIT=0
        case "${host}" in
        x86_64-*x32)
-            opal_cv_asm_arch="AMD64"
+            opal_cv_asm_arch="X86_64"
            OPAL_ASM_SUPPORT_64BIT=1
            OPAL_GCC_INLINE_ASSIGN='"xaddl %1,%0" : "=m"(ret), "+r"(negone) : "m"(ret)'
            ;;
@ -1012,7 +1012,7 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
            if test "$ac_cv_sizeof_long" = "4" ; then
                opal_cv_asm_arch="IA32"
            else
-                opal_cv_asm_arch="AMD64"
+                opal_cv_asm_arch="X86_64"
            fi
            OPAL_ASM_SUPPORT_64BIT=1
            OPAL_GCC_INLINE_ASSIGN='"xaddl %1,%0" : "=m"(ret), "+r"(negone) : "m"(ret)'
@ -1193,7 +1193,7 @@ AC_MSG_ERROR([Can not continue.])

    # Check for RDTSCP support
    result=0
-    AS_IF([test "$opal_cv_asm_arch" = "OPAL_AMD64" || test "$opal_cv_asm_arch" = "OPAL_IA32"],
+    AS_IF([test "$opal_cv_asm_arch" = "OPAL_X86_64" || test "$opal_cv_asm_arch" = "OPAL_IA32"],
          [AC_MSG_CHECKING([for RDTSCP assembly support])
           AC_LANG_PUSH([C])
           AC_TRY_RUN([[
--- a/ompi/mca/osc/portals4/osc_portals4_component.c
+++ b/ompi/mca/osc/portals4/osc_portals4_component.c
@ -3,7 +3,7 @@
 * Copyright (c) 2011-2017 Sandia National Laboratories.  All rights reserved.
 * Copyright (c) 2015      Los Alamos National Security, LLC.  All rights
 *                         reserved.
- * Copyright (c) 2015      Research Organization for Information Science
+ * Copyright (c) 2015-2017 Research Organization for Information Science
 *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
@ -590,7 +590,7 @@ component_select(struct ompi_win_t *win, void **base, size_t size, int disp_unit

    module->passive_target_access_epoch = false;

-#if OPAL_ASSEMBLY_ARCH == OPAL_AMD64 || OPAL_ASSEMBLY_ARCH == OPAL_IA32
+#if OPAL_ASSEMBLY_ARCH == OPAL_X86_64 || OPAL_ASSEMBLY_ARCH == OPAL_IA32
    *model = MPI_WIN_UNIFIED;
 #else
    *model = MPI_WIN_SEPARATE;
--- a/opal/asm/Makefile.am
+++ b/opal/asm/Makefile.am
@ -10,6 +10,8 @@
 # Copyright (c) 2004-2005 The Regents of the University of California.
 #                         All rights reserved.
 # Copyright (c) 2011-2014 Cisco Systems, Inc.  All rights reserved.
+# Copyright (c) 2017      Research Organization for Information Science
+#                         and Technology (RIST). All rights reserved.
 # $COPYRIGHT$
 #
 # Additional copyrights may follow
@ -63,7 +65,7 @@ EXTRA_DIST	= \
 	generate-all-asm.pl \
 	base/aix.conf \
 	base/default.conf \
-	base/AMD64.asm \
+	base/X86_64.asm \
 	base/ARM.asm \
 	base/IA32.asm \
 	base/IA64.asm \
--- a/opal/asm/asm-data.txt
+++ b/opal/asm/asm-data.txt
@ -10,6 +10,8 @@
 # Copyright (c) 2004-2005 The Regents of the University of California.
 #                         All rights reserved.
 # Copyright (c) 2014      Intel, Inc. All rights reserved.
+# Copyright (c) 2017      Research Organization for Information Science
+#                         and Technology (RIST). All rights reserved.
 # $COPYRIGHT$
 #
 # Additional copyrights may follow
@ -34,8 +36,8 @@
 #
 ######################################################################

-AMD64	default-.text-.globl-:--.L-@-1-0-1-1-1	amd64-linux
-AMD64	default-.text-.globl-:--.L-@-1-0-1-1-0	amd64-linux-nongas
+X86_64	default-.text-.globl-:--.L-@-1-0-1-1-1	x86_64-linux
+X86_64	default-.text-.globl-:--.L-@-1-0-1-1-0	x86_64-linux-nongas


 ######################################################################
--- a/opal/asm/base/X86_64.asm
+++ b/opal/asm/base/X86_64.asm
--- a/opal/include/opal/sys/Makefile.am
+++ b/opal/include/opal/sys/Makefile.am
@ -13,6 +13,8 @@
 # Copyright (c) 2011      Sandia National Laboratories. All rights reserved.
 # Copyright (c) 2016      Los Alamos National Security, LLC. All rights
 #                         reserved.
+# Copyright (c) 2017      Research Organization for Information Science
+#                         and Technology (RIST). All rights reserved.
 # $COPYRIGHT$
 #
 # Additional copyrights may follow
@ -29,7 +31,7 @@ headers += \
 	opal/sys/timer.h \
        opal/sys/cma.h

-include opal/sys/amd64/Makefile.am
+include opal/sys/x86_64/Makefile.am
 include opal/sys/arm/Makefile.am
 include opal/sys/arm64/Makefile.am
 include opal/sys/ia32/Makefile.am
--- a/opal/include/opal/sys/architecture.h
+++ b/opal/include/opal/sys/architecture.h
@ -13,6 +13,8 @@
 * Copyright (c) 2014      Intel, Inc. All rights reserved
 * Copyright (c) 2016      Los Alamos National Security, LLC. All rights
 *                         reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -31,7 +33,7 @@
 #define OPAL_UNSUPPORTED    0000
 #define OPAL_IA32           0010
 #define OPAL_IA64           0020
-#define OPAL_AMD64          0030
+#define OPAL_X86_64         0030
 #define OPAL_POWERPC32      0050
 #define OPAL_POWERPC64      0051
 #define OPAL_SPARC          0060
--- a/opal/include/opal/sys/atomic.h
+++ b/opal/include/opal/sys/atomic.h
@ -14,6 +14,8 @@
 * Copyright (c) 2011      Sandia National Laboratories. All rights reserved.
 * Copyright (c) 2011-2015 Los Alamos National Security, LLC. All rights
 *                         reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -153,8 +155,8 @@ enum {
 #include "opal/sys/gcc_builtin/atomic.h"
 #elif OPAL_ASSEMBLY_BUILTIN == OPAL_BUILTIN_OSX
 #include "opal/sys/osx/atomic.h"
-#elif OPAL_ASSEMBLY_ARCH == OPAL_AMD64
-#include "opal/sys/amd64/atomic.h"
+#elif OPAL_ASSEMBLY_ARCH == OPAL_X86_64
+#include "opal/sys/x86_64/atomic.h"
 #elif OPAL_ASSEMBLY_ARCH == OPAL_ARM
 #include "opal/sys/arm/atomic.h"
 #elif OPAL_ASSEMBLY_ARCH == OPAL_ARM64
--- a/opal/include/opal/sys/cma.h
+++ b/opal/include/opal/sys/cma.h
@ -1,8 +1,10 @@
 /*
- * Copyright (c) 2011-2012      IBM Corporation.  All rights reserved.
- * Copyright (c) 2016           Los Alamos National Security, LLC. All rights
- *                              reserved.
- *
+ * Copyright (c) 2011-2012 IBM Corporation.  All rights reserved.
+ * Copyright (c) 2016      Los Alamos National Security, LLC. All rights
+ *                         reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
+ * $COPYRIGHT$
 */

 /** @file
@ -35,7 +37,7 @@

 /* Cross Memory Attach is so far only supported under linux */

-#if OPAL_ASSEMBLY_ARCH == OPAL_AMD64
+#if OPAL_ASSEMBLY_ARCH == OPAL_X86_64
 #define __NR_process_vm_readv 310
 #define __NR_process_vm_writev 311
 #elif OPAL_ASSEMBLY_ARCH == OPAL_IA32
--- a/opal/include/opal/sys/timer.h
+++ b/opal/include/opal/sys/timer.h
@ -84,8 +84,8 @@ BEGIN_C_DECLS

 #if defined(DOXYGEN)
 /* don't include system-level gorp when generating doxygen files */
-#elif OPAL_ASSEMBLY_ARCH == OPAL_AMD64
-#include "opal/sys/amd64/timer.h"
+#elif OPAL_ASSEMBLY_ARCH == OPAL_X86_64
+#include "opal/sys/x86_64/timer.h"
 #elif OPAL_ASSEMBLY_ARCH == OPAL_ARM
 #include "opal/sys/arm/timer.h"
 #elif OPAL_ASSEMBLY_ARCH == OPAL_ARM64
--- a/opal/include/opal/sys/x86_64/Makefile.am
+++ b/opal/include/opal/sys/x86_64/Makefile.am
@ -9,6 +9,8 @@
 #                         University of Stuttgart.  All rights reserved.
 # Copyright (c) 2004-2005 The Regents of the University of California.
 #                         All rights reserved.
+# Copyright (c) 2017      Research Organization for Information Science
+#                         and Technology (RIST). All rights reserved.
 # $COPYRIGHT$
 #
 # Additional copyrights may follow
@ -19,5 +21,5 @@
 # This makefile.am does not stand on its own - it is included from opal/include/Makefile.am

 headers += \
-	opal/sys/amd64/atomic.h \
-	opal/sys/amd64/timer.h
+	opal/sys/x86_64/atomic.h \
+	opal/sys/x86_64/timer.h
--- a/opal/include/opal/sys/x86_64/atomic.h
+++ b/opal/include/opal/sys/x86_64/atomic.h
@ -13,7 +13,7 @@
 * Copyright (c) 2007      Sun Microsystems, Inc.  All rights reserverd.
 * Copyright (c) 2012-2014 Los Alamos National Security, LLC. All rights
 *                         reserved.
- * Copyright (c) 2016      Research Organization for Information Science
+ * Copyright (c) 2016-2017 Research Organization for Information Science
 *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
@ -25,7 +25,7 @@
 #define OPAL_SYS_ARCH_ATOMIC_H 1

 /*
- * On amd64, we use cmpxchg.
+ * On x86_64, we use cmpxchg.
 */


--- a/opal/include/opal/sys/x86_64/timer.h
+++ b/opal/include/opal/sys/x86_64/timer.h
--- a/opal/include/opal/sys/x86_64/update.sh
+++ b/opal/include/opal/sys/x86_64/update.sh
--- a/opal/mca/patcher/base/patcher_base_patch.c
+++ b/opal/mca/patcher/base/patcher_base_patch.c
@ -2,6 +2,8 @@
 /*
 * Copyright (c) 2016      Los Alamos National Security, LLC. All rights
 *                         reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -100,7 +102,7 @@ static void flush_and_invalidate_cache (unsigned long a)
        /* does not work with AMD processors */
        __asm__ volatile("mfence;clflush %0;mfence" : :"m" (*(char*)a));
    }
-#elif OPAL_ASSEMBLY_ARCH == OPAL_AMD64
+#elif OPAL_ASSEMBLY_ARCH == OPAL_X86_64
    __asm__ volatile("mfence;clflush %0;mfence" : :"m" (*(char*)a));
 #elif OPAL_ASSEMBLY_ARCH == OPAL_IA64
    __asm__ volatile ("fc %0;; sync.i;; srlz.i;;" : : "r"(a) : "memory");
--- a/opal/mca/patcher/overwrite/patcher_overwrite_module.c
+++ b/opal/mca/patcher/overwrite/patcher_overwrite_module.c
@ -3,6 +3,8 @@
 * Copyright (c) 2016      Los Alamos National Security, LLC. All rights
 *                         reserved.
 * Copyright (c) 2016      IBM Corporation.  All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -28,7 +30,7 @@
 #include <dlfcn.h>
 #include <assert.h>

-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)

 #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64)

@ -91,7 +93,7 @@ static int mca_patcher_overwrite_apply_patch (mca_patcher_base_patch_t *patch)
        patch->patch_data_size = 5;
        *(unsigned char *)(patch->patch_data+0) = 0xe9;
        *(unsigned int *) (patch->patch_data+1) = (unsigned int)(func_new_addr - patch->patch_orig - 5);
-#elif (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#elif (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
        patch->patch_data_size = 13;
        *(unsigned short*)(patch->patch_data + 0) = 0xbb49;
        *(unsigned long* )(patch->patch_data + 2) = (unsigned long) func_new_addr;
--- a/oshmem/shmem/c/shmem_clear_cache_inv.c
+++ b/oshmem/shmem/c/shmem_clear_cache_inv.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -26,7 +28,7 @@

 void shmem_clear_cache_inv(void)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_inv is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */
--- a/oshmem/shmem/c/shmem_clear_cache_line_inv.c
+++ b/oshmem/shmem/c/shmem_clear_cache_line_inv.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -26,7 +28,7 @@

 void shmem_clear_cache_line_inv(void *target)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_line_inv is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */
--- a/oshmem/shmem/c/shmem_set_cache_inv.c
+++ b/oshmem/shmem/c/shmem_set_cache_inv.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -26,7 +28,7 @@

 void shmem_set_cache_inv(void)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_set_cache_inv is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */
--- a/oshmem/shmem/c/shmem_set_cache_line_inv.c
+++ b/oshmem/shmem/c/shmem_set_cache_line_inv.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -26,7 +28,7 @@

 void shmem_set_cache_line_inv(void *target)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_set_cache_line_inv is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */
--- a/oshmem/shmem/c/shmem_udcflush.c
+++ b/oshmem/shmem/c/shmem_udcflush.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -25,7 +27,7 @@

 void shmem_udcflush(void)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_udcflush is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */
--- a/oshmem/shmem/c/shmem_udcflush_line.c
+++ b/oshmem/shmem/c/shmem_udcflush_line.c
@ -2,6 +2,8 @@
 * Copyright (c) 2013      Mellanox Technologies, Inc.
 *                         All rights reserved.
 * Copyright (c) 2014      Intel, Inc. All rights reserved.
+ * Copyright (c) 2017      Research Organization for Information Science
+ *                         and Technology (RIST). All rights reserved.
 * $COPYRIGHT$
 *
 * Additional copyrights may follow
@ -24,7 +26,7 @@

 void shmem_udcflush_line(void *target)
 {
-#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
+#if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_X86_64)
    do {SHMEM_API_VERBOSE(10,"shmem_udcflush_line is not supported by the current CPU architecture");}while (0);
 #else
    /* another implementation */