Merge pull request #6453 from nysal/xlc_asm_warning_fix
opal/asm: Fix a compiler warning on POWER arch
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a4b2f2b914
@ -98,27 +98,7 @@ void opal_atomic_isync(void)
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ISYNC();
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}
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#elif OPAL_XLC_INLINE_ASSEMBLY /* end OPAL_GCC_INLINE_ASSEMBLY */
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/* Yeah, I don't know who thought this was a reasonable syntax for
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* inline assembly. Do these because they are used so often and they
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* are fairly simple (aka: there is a tech pub on IBM's web site
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* containing the right hex for the instructions).
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*/
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#undef OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
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#define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER 0
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#pragma mc_func opal_atomic_mb { "7c0004ac" } /* sync */
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#pragma reg_killed_by opal_atomic_mb /* none */
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#pragma mc_func opal_atomic_rmb { "7c2004ac" } /* lwsync */
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#pragma reg_killed_by opal_atomic_rmb /* none */
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#pragma mc_func opal_atomic_wmb { "7c2004ac" } /* lwsync */
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#pragma reg_killed_by opal_atomic_wmb /* none */
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#endif
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#endif /* end OPAL_GCC_INLINE_ASSEMBLY */
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/**********************************************************************
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*
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@ -296,7 +276,7 @@ static inline bool opal_atomic_compare_exchange_strong_64 (opal_atomic_int64_t *
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#define opal_atomic_sc_64(addr, value, ret) \
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do { \
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opal_atomic_int64_t *_addr = (addr); \
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int64_t _foo, _newval = (int64_t) value; \
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int64_t _newval = (int64_t) value; \
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int32_t _ret; \
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\
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__asm__ __volatile__ (" stdcx. %2, 0, %1 \n\t" \
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