Rework of r16807. For opal atomics:
* Conditionalize around `static inline` using `OPAL_HAVE_INLINE_ATOMIC*` macros * Remove redundant `opal_atomic*` prototypes (they belong in the top-level `sys/atomic.h` This commit was SVN r16957. The following SVN revision numbers were found above: r16807 --> open-mpi/ompi@b7c885247a
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@ -9,6 +9,7 @@
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2007 Sun Microsystems, Inc. All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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@ -108,6 +109,21 @@ struct opal_atomic_lock_t {
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};
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typedef struct opal_atomic_lock_t opal_atomic_lock_t;
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/**********************************************************************
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*
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* Zero these macros in the architecture-specific atomic.h files if we
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* need to define their corresponding functions as non-inline (e.g.,
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* in an opal/asm/base/<arch>.asm file). These macros allow us to make
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* the signatures of the prototype and definition identical.
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*
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*********************************************************************/
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#define OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_INLINE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_INLINE_ATOMIC_CMPSET_64 1
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#define OPAL_HAVE_INLINE_ATOMIC_ADD_32 1
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#define OPAL_HAVE_INLINE_ATOMIC_SUB_32 1
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#define OPAL_HAVE_INLINE_ATOMIC_ADD_64 1
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#define OPAL_HAVE_INLINE_ATOMIC_SUB_64 1
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/**********************************************************************
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*
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@ -179,6 +195,10 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
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* generally grinding the memory controller's performance. Use only
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* if you need *both* read and write barriers.
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*/
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#if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
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static inline
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#endif
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void opal_atomic_mb(void);
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/**
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@ -190,6 +210,10 @@ void opal_atomic_mb(void);
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* next read. Nothing is said about the ordering of writes when using
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* \c opal_atomic_rmb().
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*/
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#if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
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static inline
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#endif
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void opal_atomic_rmb(void);
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/**
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@ -201,6 +225,10 @@ void opal_atomic_rmb(void);
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* next write. Nothing is said about the ordering of reads when using
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* \c opal_atomic_wmb().
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*/
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#if OPAL_HAVE_INLINE_ATOMIC_MEM_BARRIER
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static inline
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#endif
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void opal_atomic_wmb(void);
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#endif /* defined(DOXYGEN) || OPAL_HAVE_ATOMIC_MEM_BARRIER */
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@ -293,10 +321,22 @@ void opal_atomic_unlock(opal_atomic_lock_t *lock);
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#define OPAL_HAVE_ATOMIC_CMPSET_32 0
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#endif
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#if defined(DOXYGEN) || OPAL_HAVE_ATOMIC_CMPSET_32
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_32
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static inline
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#endif
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int opal_atomic_cmpset_32(volatile int32_t *addr, int32_t oldval,
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int32_t newval);
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_32
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static inline
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#endif
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int opal_atomic_cmpset_acq_32(volatile int32_t *addr, int32_t oldval,
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int32_t newval);
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_32
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static inline
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#endif
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int opal_atomic_cmpset_rel_32(volatile int32_t *addr, int32_t oldval,
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int32_t newval);
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#endif
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@ -306,28 +346,46 @@ int opal_atomic_cmpset_rel_32(volatile int32_t *addr, int32_t oldval,
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#define OPAL_HAVE_ATOMIC_CMPSET_64 0
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#endif
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#if defined(DOXYGEN) || OPAL_HAVE_ATOMIC_CMPSET_64
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_64
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static inline
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#endif
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int opal_atomic_cmpset_64(volatile int64_t *addr, int64_t oldval,
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int64_t newval);
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_64
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static inline
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#endif
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int opal_atomic_cmpset_acq_64(volatile int64_t *addr, int64_t oldval,
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int64_t newval);
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#if OPAL_HAVE_INLINE_ATOMIC_CMPSET_64
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static inline
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#endif
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int opal_atomic_cmpset_rel_64(volatile int64_t *addr, int64_t oldval,
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int64_t newval);
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#endif
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#if !defined(OPAL_HAVE_ATOMIC_MATH_32) && !defined(DOXYGEN)
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/* define to 0 for these tests. WIll fix up later. */
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#define OPAL_HAVE_ATOMIC_MATH_32 0
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#endif
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#if defined(DOXYGEN) || OPAL_HAVE_ATOMIC_MATH_32 || OPAL_HAVE_ATOMIC_CMPSET_32
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#if ! OPAL_HAVE_ATOMIC_MATH_32
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#if OPAL_HAVE_INLINE_ATOMIC_ADD_32
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static inline
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#endif
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int32_t opal_atomic_add_32(volatile int32_t *addr, int delta);
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#if ! OPAL_HAVE_ATOMIC_MATH_32
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#if OPAL_HAVE_INLINE_ATOMIC_SUB_32
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static inline
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#endif
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int32_t opal_atomic_sub_32(volatile int32_t *addr, int delta);
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#endif /* OPAL_HAVE_ATOMIC_MATH_32 */
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#if ! OPAL_HAVE_ATOMIC_MATH_32
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/* fix up the value of ompi_have_atomic_math_32 to allow for C versions */
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#undef OPAL_HAVE_ATOMIC_MATH_32
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@ -338,16 +396,21 @@ int32_t opal_atomic_sub_32(volatile int32_t *addr, int delta);
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/* define to 0 for these tests. WIll fix up later. */
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#define OPAL_HAVE_ATOMIC_MATH_64 0
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#endif
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#if defined(DOXYGEN) || OPAL_HAVE_ATOMIC_MATH_64 || OPAL_HAVE_ATOMIC_CMPSET_64
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#if OPAL_HAVE_ATOMIC_CMPSET_64
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#if OPAL_HAVE_INLINE_ATOMIC_ADD_64
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static inline
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#endif
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int64_t opal_atomic_add_64(volatile int64_t *addr, int64_t delta);
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#if OPAL_HAVE_ATOMIC_CMPSET_64
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#if OPAL_HAVE_INLINE_ATOMIC_SUB_64
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static inline
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#endif
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int64_t opal_atomic_sub_64(volatile int64_t *addr, int64_t delta);
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#endif /* OPAL_HAVE_ATOMIC_MATH_32 */
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#if ! OPAL_HAVE_ATOMIC_MATH_64
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/* fix up the value of ompi_have_atomic_math_64 to allow for C versions */
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#undef OPAL_HAVE_ATOMIC_MATH_64
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@ -525,12 +588,8 @@ static inline int64_t opal_atomic_sub_ptr( volatile void* addr, void* delta );
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*********************************************************************/
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#include "opal/sys/atomic_impl.h"
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#if defined(c_plusplus) || defined(__cplusplus)
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}
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#endif
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#endif /* OPAL_SYS_ATOMIC_H */
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@ -48,6 +48,8 @@
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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#undef OPAL_HAVE_INLINE_ATOMIC_CMPSET_64
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#define OPAL_HAVE_INLINE_ATOMIC_CMPSET_64 0
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/**********************************************************************
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*
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@ -96,24 +96,15 @@ void opal_atomic_wmb(void)
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* containing the right hex for the instructions).
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*/
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void opal_atomic_mb(void);
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#pragma mc_func opal_atomic_mb { "7c0004ac" } /* sync */
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#pragma reg_killed_by opal_atomic_mb /* none */
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void opal_atomic_rmb(void);
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#pragma mc_func opal_atomic_rmb { "7c2004ac" } /* lwsync */
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#pragma reg_killed_by opal_atomic_rmb /* none */
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void opal_atomic_wmb(void);
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#pragma mc_func opal_atomic_wmb { "7c0006ac" } /* eieio */
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#pragma reg_killed_by opal_atomic_wmb /* none */
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#else /* end OMPI_XLC_INLINE_ASSEMBLY */
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void opal_atomic_mb(void);
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void opal_atomic_rmb(void);
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void opal_atomic_wmb(void);
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#endif
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/**********************************************************************
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@ -166,13 +157,6 @@ static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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return opal_atomic_cmpset_32(addr, oldval, newval);
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}
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#else
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int opal_atomic_cmpset_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval);
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int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval);
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int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval);
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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@ -222,15 +206,6 @@ static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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return opal_atomic_cmpset_64(addr, oldval, newval);
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}
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#else /* OMPI_GCC_INLINE_ASSEMBLY */
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int opal_atomic_cmpset_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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#elif (OMPI_ASSEMBLY_ARCH == OMPI_POWERPC32) && OMPI_ASM_SUPPORT_64BIT
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@ -302,15 +277,6 @@ static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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return opal_atomic_cmpset_64(addr, oldval, newval);
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}
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#else /* OMPI_GCC_INLINE_ASSEMBLY */
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int opal_atomic_cmpset_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval);
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#endif /* OMPI_GCC_INLINE_ASSEMBLY */
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#endif /* OMPI_ASM_SUPPORT_64BIT */
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