First step on fixing the BTL API conversion for the SMCUDA BTL
Signed-off-by: George Bosilca <bosilca@icl.utk.edu>
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1f237f5fc9
Коммит
96e8cbe25f
@ -624,10 +624,10 @@ void mca_pml_ob1_recv_frag_callback_frag (mca_btl_base_module_t *btl,
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assert(btl->btl_flags & MCA_BTL_FLAGS_CUDA_COPY_ASYNC_RECV);
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/* This will trigger the opal_convertor_pack to start asynchronous copy. */
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mca_pml_ob1_recv_request_frag_copy_start(recvreq,btl,segments,descriptor->des_segment_count,des);
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mca_pml_ob1_recv_request_frag_copy_start(recvreq, btl, segments, descriptor->des_segment_count, NULL);
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/* Let BTL know that it CANNOT free the frag */
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descriptor->des_flags |= MCA_BTL_DES_FLAGS_CUDA_COPY_ASYNC;
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//TODO: GB: descriptor->des_flags |= MCA_BTL_DES_FLAGS_CUDA_COPY_ASYNC;
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return;
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}
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@ -577,7 +577,7 @@ void mca_pml_ob1_recv_request_progress_frag( mca_pml_ob1_recv_request_t* recvreq
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*/
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void mca_pml_ob1_recv_request_frag_copy_start( mca_pml_ob1_recv_request_t* recvreq,
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mca_btl_base_module_t* btl,
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mca_btl_base_segment_t* segments,
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const mca_btl_base_segment_t* segments,
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size_t num_segments,
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mca_btl_base_descriptor_t* des)
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{
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@ -332,7 +332,7 @@ void mca_pml_ob1_recv_request_progress_frag(
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void mca_pml_ob1_recv_request_frag_copy_start(
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mca_pml_ob1_recv_request_t* req,
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struct mca_btl_base_module_t* btl,
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mca_btl_base_segment_t* segments,
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const mca_btl_base_segment_t* segments,
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size_t num_segments,
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mca_btl_base_descriptor_t* des);
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@ -3,7 +3,7 @@
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* Copyright (c) 2004-2011 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2009 The University of Tennessee and The University
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* Copyright (c) 2004-2020 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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@ -679,20 +679,15 @@ static void mca_btl_smcuda_send_cuda_ipc_ack(struct mca_btl_base_module_t* btl,
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* BTL. It handles smcuda specific control messages that are triggered
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* when GPU memory transfers are initiated. */
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static void btl_smcuda_control(mca_btl_base_module_t* btl,
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mca_btl_base_tag_t tag,
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mca_btl_base_descriptor_t* des, void* cbdata)
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const mca_btl_base_receive_descriptor_t *descriptor)
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{
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int mydevnum, ipcaccess, res;
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ctrlhdr_t ctrlhdr;
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opal_proc_t *ep_proc;
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struct mca_btl_base_endpoint_t *endpoint;
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mca_btl_smcuda_t *smcuda_btl = (mca_btl_smcuda_t *)btl;
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mca_btl_smcuda_frag_t *frag = (mca_btl_smcuda_frag_t *)des;
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mca_btl_base_segment_t* segments = des->des_segments;
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const mca_btl_base_segment_t* segments = descriptor->des_segments;
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struct mca_btl_base_endpoint_t *endpoint = descriptor->endpoint;
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/* Use the rank of the peer that sent the data to get to the endpoint
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* structure. This is needed for PML callback. */
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endpoint = mca_btl_smcuda_component.sm_peers[frag->hdr->my_smp_rank];
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ep_proc = endpoint->proc_opal;
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/* Copy out control message payload to examine it */
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@ -764,7 +759,6 @@ static void btl_smcuda_control(mca_btl_base_module_t* btl,
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}
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}
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assert(endpoint->peer_smp_rank == frag->hdr->my_smp_rank);
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opal_output_verbose(10, mca_btl_smcuda_component.cuda_ipc_output,
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"Analyzed CUDA IPC request: myrank=%d, mydev=%d, peerrank=%d, "
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"peerdev=%d --> ACCESS=%d",
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@ -999,7 +993,6 @@ int mca_btl_smcuda_component_progress(void)
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/* local variables */
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mca_btl_base_segment_t seg;
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mca_btl_smcuda_frag_t *frag;
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mca_btl_smcuda_frag_t Frag;
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sm_fifo_t *fifo = NULL;
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mca_btl_smcuda_hdr_t *hdr;
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int my_smp_rank = mca_btl_smcuda_component.my_smp_rank;
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@ -1046,7 +1039,6 @@ int mca_btl_smcuda_component_progress(void)
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switch(((uintptr_t)hdr) & MCA_BTL_SMCUDA_FRAG_TYPE_MASK) {
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case MCA_BTL_SMCUDA_FRAG_SEND:
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{
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mca_btl_active_message_callback_t* reg;
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/* change the address from address relative to the shared
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* memory address, to a true virtual address */
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hdr = (mca_btl_smcuda_hdr_t *) RELATIVE2VIRTUAL(hdr);
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@ -1058,17 +1050,16 @@ int mca_btl_smcuda_component_progress(void)
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my_smp_rank, peer_smp_rank, j, FIFO_MAP(peer_smp_rank));
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}
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#endif
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/* recv upcall */
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reg = mca_btl_base_active_message_trigger + hdr->tag;
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seg.seg_addr.pval = ((char *)hdr) + sizeof(mca_btl_smcuda_hdr_t);
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seg.seg_len = hdr->len;
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Frag.base.des_segment_count = 1;
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Frag.base.des_segments = &seg;
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#if OPAL_CUDA_SUPPORT
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Frag.hdr = hdr; /* needed for peer rank in control messages */
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#endif /* OPAL_CUDA_SUPPORT */
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reg->cbfunc(&mca_btl_smcuda.super, hdr->tag, &(Frag.base),
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reg->cbdata);
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mca_btl_active_message_callback_t *reg = mca_btl_base_active_message_trigger + hdr->tag;
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mca_btl_base_receive_descriptor_t recv_desc = {.endpoint = mca_btl_smcuda_component.sm_peers[peer_smp_rank],
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.des_segments = &seg,
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.des_segment_count = 1,
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.tag = hdr->tag,
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.cbdata = reg->cbdata};
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reg->cbfunc(&mca_btl_smcuda.super, &recv_desc);
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/* return the fragment */
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MCA_BTL_SMCUDA_FIFO_WRITE(
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mca_btl_smcuda_component.sm_peers[peer_smp_rank],
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