Correct the atomics on x86 and x86_64. Thanks to Iain for the catch,
to Eugene, Jeff, and Briand for the help. This patch is supposed to fix several outstanding issues, notably the one on tickets #2043. This commit was SVN r22324.
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Коммит
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@ -84,11 +84,11 @@ static inline int opal_atomic_cmpset_32( volatile int32_t *addr,
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{
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unsigned char ret;
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__asm__ __volatile__ (
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SMPLOCK "cmpxchgl %1,%2 \n\t"
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SMPLOCK "cmpxchgl %3,%4 \n\t"
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"sete %0 \n\t"
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: "=qm" (ret)
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: "q"(newval), "m"(*addr), "a"(oldval)
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: "memory");
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: "=qm" (ret), "=a" (oldval), "=m" (*addr)
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: "q"(newval), "m"(*addr), "1"(oldval)
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);
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return (int)ret;
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}
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@ -105,11 +105,11 @@ static inline int opal_atomic_cmpset_64( volatile int64_t *addr,
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{
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unsigned char ret;
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__asm__ __volatile__ (
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SMPLOCK "cmpxchgq %1,%2 \n\t"
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SMPLOCK "cmpxchgq %3,%4 \n\t"
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"sete %0 \n\t"
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: "=qm" (ret)
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: "q"(newval), "m"(*((volatile long*)addr)), "a"(oldval)
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: "memory");
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: "=qm" (ret), "=a" (oldval), "=m" (*((volatile long*)addr))
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: "q"(newval), "m"(*((volatile long*)addr)), "1"(oldval)
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);
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return (int)ret;
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}
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@ -91,11 +91,11 @@ static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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{
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unsigned char ret;
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__asm__ __volatile__ (
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SMPLOCK "cmpxchgl %1,%2 \n\t"
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SMPLOCK "cmpxchgl %3,%4 \n\t"
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"sete %0 \n\t"
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: "=qm" (ret)
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: "q"(newval), "m"(*((volatile long*)addr)), "a"(oldval)
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: "memory");
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: "=qm" (ret), "=a" (oldval), "=m" (*addr)
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: "q"(newval), "m"(*((volatile long*)addr)), "1"(oldval)
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);
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return (int)ret;
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}
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