Fixes trac:2680: Add ARM support.
This commit was SVN r24308. The following Trac tickets were found above: Ticket 2680 --> https://svn.open-mpi.org/trac/ompi/ticket/2680
Этот коммит содержится в:
Jeff Squyres
родитель
81fd41f811
Коммит
511f87665b
1
LICENSE
1
LICENSE
@ -40,6 +40,7 @@ Copyright (c) 2006-2010 QLogic Corporation. All rights reserved.
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Copyright (c) 2008-2010 Oak Ridge National Labs. All rights reserved.
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Copyright (c) 2006-2010 Oracle and/or its affiliates. All rights reserved.
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Copyright (c) 2009 Bull SAS. All rights reserved.
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Copyright (c) 2010 ARM ltd. All rights reserved.
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$COPYRIGHT$
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1
NEWS
1
NEWS
@ -62,6 +62,7 @@ Trunk (not on release branches yet)
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OPAL levels - intended for use when configuring without MPI support
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- Modified paffinity system to provide warning when bindings result in
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being "bound to all", which is equivalent to "not bound"
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- Added ARM support.
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1.5.2
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@ -46,6 +46,15 @@ AMD64 default-.text-.globl-:--.L-@-1-0-1-1-1 amd64-linux
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AMD64 default-.text-.globl-:--.L-@-1-0-1-1-0 amd64-linux-nongas
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######################################################################
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#
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# ARM (ARMv7 and later)
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#
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######################################################################
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ARM default-.text-.globl-:--.L-#-1-1-1-1-1 arm-linux
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######################################################################
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#
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# Intel Pentium Class
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150
opal/asm/base/ARM.asm
Обычный файл
150
opal/asm/base/ARM.asm
Обычный файл
@ -0,0 +1,150 @@
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START_FILE
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TEXT
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ALIGN(4)
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START_FUNC(opal_atomic_mb)
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dmb
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bx lr
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END_FUNC(opal_atomic_mb)
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START_FUNC(opal_atomic_rmb)
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dmb
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bx lr
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END_FUNC(opal_atomic_rmb)
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START_FUNC(opal_atomic_wmb)
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dmb
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bx lr
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END_FUNC(opal_atomic_wmb)
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START_FUNC(opal_atomic_cmpset_32)
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LSYM(1)
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ldrex r3, [r0]
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cmp r1, r3
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bne REFLSYM(2)
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strex r12, r2, [r0]
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cmp r12, #0
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bne REFLSYM(1)
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mov r0, #1
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LSYM(2)
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movne r0, #0
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bx lr
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END_FUNC(opal_atomic_cmpset_32)
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START_FUNC(opal_atomic_cmpset_acq_32)
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LSYM(3)
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ldrex r3, [r0]
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cmp r1, r3
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bne REFLSYM(4)
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strex r12, r2, [r0]
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cmp r12, #0
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bne REFLSYM(3)
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dmb
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mov r0, #1
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LSYM(4)
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movne r0, #0
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bx lr
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END_FUNC(opal_atomic_cmpset_acq_32)
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START_FUNC(opal_atomic_cmpset_rel_32)
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LSYM(5)
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ldrex r3, [r0]
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cmp r1, r3
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bne REFLSYM(6)
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dmb
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strex r12, r2, [r0]
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cmp r12, #0
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bne REFLSYM(4)
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mov r0, #1
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LSYM(6)
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movne r0, #0
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bx lr
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END_FUNC(opal_atomic_cmpset_rel_32)
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#START_64BIT
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START_FUNC(opal_atomic_cmpset_64)
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push {r4-r7}
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ldrd r6, r7, [sp, #16]
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LSYM(7)
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ldrexd r4, r5, [r0]
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cmp r4, r2
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cmpeq r5, r3
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bne REFLSYM(8)
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strexd r1, r6, r7, [r0]
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cmp r1, #0
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bne REFLSYM(7)
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mov r0, #1
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LSYM(8)
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movne r0, #0
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pop {r4-r7}
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bx lr
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END_FUNC(opal_atomic_cmpset_64)
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START_FUNC(opal_atomic_cmpset_acq_64)
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push {r4-r7}
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ldrd r6, r7, [sp, #16]
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LSYM(9)
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ldrexd r4, r5, [r0]
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cmp r4, r2
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cmpeq r5, r3
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bne REFLSYM(10)
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strexd r1, r6, r7, [r0]
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cmp r1, #0
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bne REFLSYM(9)
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dmb
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mov r0, #1
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LSYM(10)
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movne r0, #0
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pop {r4-r7}
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bx lr
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END_FUNC(opal_atomic_cmpset_acq_64)
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START_FUNC(opal_atomic_cmpset_rel_64)
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push {r4-r7}
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ldrd r6, r7, [sp, #16]
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LSYM(11)
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ldrexd r4, r5, [r0]
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cmp r4, r2
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cmpeq r5, r3
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bne REFLSYM(12)
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dmb
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strexd r1, r6, r7, [r0]
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cmp r1, #0
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bne REFLSYM(11)
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mov r0, #1
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LSYM(12)
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movne r0, #0
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pop {r4-r7}
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bx lr
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END_FUNC(opal_atomic_cmpset_rel_64)
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#END_64BIT
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START_FUNC(opal_atomic_add_32)
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LSYM(13)
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ldrex r2, [r0]
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add r2, r2, r1
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strex r3, r2, [r0]
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cmp r3, #0
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bne REFLSYM(13)
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mov r0, r2
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bx lr
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END_FUNC(opal_atomic_add_32)
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START_FUNC(opal_atomic_sub_32)
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LSYM(14)
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ldrex r2, [r0]
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sub r2, r2, r1
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strex r3, r2, [r0]
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cmp r3, #0
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bne REFLSYM(14)
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mov r0, r2
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bx lr
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END_FUNC(opal_atomic_sub_32)
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@ -103,7 +103,11 @@ while (<INPUT>) {
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}
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if ($GNU_STACK == 1) {
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if ($asmarch eq "ARM") {
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print OUTPUT "\n\t.section\t.note.GNU-stack,\"\",\%progbits\n";
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} else {
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print OUTPUT "\n\t.section\t.note.GNU-stack,\"\",\@progbits\n";
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}
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}
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close(INPUT);
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@ -900,6 +900,12 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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OMPI_GCC_INLINE_ASSIGN='"bis [$]31,[$]31,%0" : "=&r"(ret)'
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;;
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armv7*)
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ompi_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=1
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OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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;;
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mips-*|mips64*)
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# Should really find some way to make sure that we are on
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# a MIPS III machine (r4000 and later)
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@ -36,6 +36,7 @@
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#define OMPI_SPARCV9_32 0061
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#define OMPI_SPARCV9_64 0062
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#define OMPI_MIPS 0070
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#define OMPI_ARM 0100
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/* Formats */
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#define OMPI_DEFAULT 1000 /* standard for given architecture */
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24
opal/include/opal/sys/arm/Makefile.am
Обычный файл
24
opal/include/opal/sys/arm/Makefile.am
Обычный файл
@ -0,0 +1,24 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2008 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
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# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
|
||||
#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += \
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opal/sys/arm/atomic.h \
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opal/sys/arm/timer.h
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227
opal/include/opal/sys/arm/atomic.h
Обычный файл
227
opal/include/opal/sys/arm/atomic.h
Обычный файл
@ -0,0 +1,227 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
|
||||
* Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
* of Tennessee Research Foundation. All rights
|
||||
* reserved.
|
||||
* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
* University of Stuttgart. All rights reserved.
|
||||
* Copyright (c) 2004-2005 The Regents of the University of California.
|
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* All rights reserved.
|
||||
* Copyright (c) 2010 IBM Corporation. All rights reserved.
|
||||
* Copyright (c) 2010 ARM ltd. All rights reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
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* Additional copyrights may follow
|
||||
*
|
||||
* $HEADER$
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||||
*/
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#ifndef OMPI_SYS_ARCH_ATOMIC_H
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#define OMPI_SYS_ARCH_ATOMIC_H 1
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#if OPAL_WANT_SMP_LOCKS
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#define MB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define RMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#define WMB() __asm__ __volatile__ ("dmb" : : : "memory")
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#else
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#define MB()
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#define RMB()
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#define WMB()
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#endif
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/**********************************************************************
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*
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* Define constants for ARMv7
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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#define OPAL_HAVE_ATOMIC_MATH_32 1
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#define OPAL_HAVE_ATOMIC_ADD_32 1
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#define OPAL_HAVE_ATOMIC_SUB_32 1
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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#if OMPI_GCC_INLINE_ASSEMBLY
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static inline
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void opal_atomic_mb(void)
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{
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MB();
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}
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static inline
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void opal_atomic_rmb(void)
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{
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RMB();
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}
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|
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static inline
|
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void opal_atomic_wmb(void)
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||||
{
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||||
WMB();
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}
|
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||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* Atomic math operations
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||||
*
|
||||
*********************************************************************/
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static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
|
||||
{
|
||||
int32_t ret, tmp;
|
||||
|
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__asm__ __volatile__ (
|
||||
"1: ldrex %0, [%2] \n"
|
||||
" cmp %0, %3 \n"
|
||||
" bne 2f \n"
|
||||
" strex %1, %4, [%2] \n"
|
||||
" cmp %1, #0 \n"
|
||||
" bne 1b \n"
|
||||
"2: \n"
|
||||
|
||||
: "=&r" (ret), "=&r" (tmp)
|
||||
: "r" (addr), "r" (oldval), "r" (newval)
|
||||
: "cc", "memory");
|
||||
|
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return (ret == oldval);
|
||||
}
|
||||
|
||||
/* these two functions aren't inlined in the non-gcc case because then
|
||||
there would be two function calls (since neither cmpset_32 nor
|
||||
atomic_?mb can be inlined). Instead, we "inline" them by hand in
|
||||
the assembly, meaning there is one function call overhead instead
|
||||
of two */
|
||||
static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
|
||||
int32_t oldval, int32_t newval)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = opal_atomic_cmpset_32(addr, oldval, newval);
|
||||
opal_atomic_rmb();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
|
||||
int32_t oldval, int32_t newval)
|
||||
{
|
||||
opal_atomic_wmb();
|
||||
return opal_atomic_cmpset_32(addr, oldval, newval);
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
int64_t ret;
|
||||
int tmp;
|
||||
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"1: ldrexd %0, %H0, [%2] \n"
|
||||
" cmp %0, %3 \n"
|
||||
" cmpeq %H0, %H3 \n"
|
||||
" bne 2f \n"
|
||||
" strexd %1, %4, %H4, [%2] \n"
|
||||
" cmp %1, #0 \n"
|
||||
" bne 1b \n"
|
||||
"2: \n"
|
||||
|
||||
: "=&r" (ret), "=&r" (tmp)
|
||||
: "r" (addr), "r" (oldval), "r" (newval)
|
||||
: "cc", "memory");
|
||||
|
||||
return (ret == oldval);
|
||||
}
|
||||
|
||||
/* these two functions aren't inlined in the non-gcc case because then
|
||||
there would be two function calls (since neither cmpset_64 nor
|
||||
atomic_?mb can be inlined). Instead, we "inline" them by hand in
|
||||
the assembly, meaning there is one function call overhead instead
|
||||
of two */
|
||||
static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
opal_atomic_rmb();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
opal_atomic_wmb();
|
||||
return opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
}
|
||||
|
||||
|
||||
static inline int32_t opal_atomic_add_32(volatile int32_t* v, int inc)
|
||||
{
|
||||
int32_t t;
|
||||
int tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: ldrex %0, [%2] \n"
|
||||
" add %0, %0, %3 \n"
|
||||
" strex %1, %0, [%2] \n"
|
||||
" cmp %1, #0 \n"
|
||||
" bne 1b \n"
|
||||
|
||||
: "=&r" (t), "=&r" (tmp)
|
||||
: "r" (v), "r" (inc)
|
||||
: "cc", "memory");
|
||||
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
|
||||
static inline int32_t opal_atomic_sub_32(volatile int32_t* v, int dec)
|
||||
{
|
||||
int32_t t;
|
||||
int tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: ldrex %0, [%2] \n"
|
||||
" sub %0, %0, %3 \n"
|
||||
" strex %1, %0, [%2] \n"
|
||||
" cmp %1, #0 \n"
|
||||
" bne 1b \n"
|
||||
|
||||
: "=&r" (t), "=&r" (tmp)
|
||||
: "r" (v), "r" (dec)
|
||||
: "cc", "memory");
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
|
||||
#endif /* OMPI_GCC_INLINE_ASSEMBLY */
|
||||
|
||||
#endif /* ! OMPI_SYS_ARCH_ATOMIC_H */
|
||||
33
opal/include/opal/sys/arm/timer.h
Обычный файл
33
opal/include/opal/sys/arm/timer.h
Обычный файл
@ -0,0 +1,33 @@
|
||||
/*
|
||||
* Copyright (c) 2008 The University of Tennessee and The University
|
||||
* of Tennessee Research Foundation. All rights
|
||||
* reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
||||
* Additional copyrights may follow
|
||||
*
|
||||
* $HEADER$
|
||||
*/
|
||||
|
||||
#ifndef OMPI_SYS_ARCH_TIMER_H
|
||||
#define OMPI_SYS_ARCH_TIMER_H 1
|
||||
|
||||
#include <sys/times.h>
|
||||
|
||||
typedef uint64_t opal_timer_t;
|
||||
|
||||
static inline opal_timer_t
|
||||
opal_sys_timer_get_cycles(void)
|
||||
{
|
||||
opal_timer_t ret;
|
||||
struct tms accurate_clock;
|
||||
|
||||
times(&accurate_clock);
|
||||
ret = accurate_clock.tms_utime + accurate_clock.tms_stime;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
|
||||
|
||||
#endif /* ! OMPI_SYS_ARCH_TIMER_H */
|
||||
37
opal/include/opal/sys/arm/update.sh
Обычный файл
37
opal/include/opal/sys/arm/update.sh
Обычный файл
@ -0,0 +1,37 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
||||
# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
||||
# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
|
||||
#
|
||||
|
||||
CFILE=/tmp/opal_atomic_$$.c
|
||||
|
||||
trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
|
||||
|
||||
echo Updating atomic.s from atomic.h using gcc
|
||||
|
||||
cat > $CFILE<<EOF
|
||||
#include <stdlib.h>
|
||||
#include <inttypes.h>
|
||||
#define static
|
||||
#define inline
|
||||
#define OMPI_GCC_INLINE_ASSEMBLY 1
|
||||
#define OPAL_WANT_SMP_LOCKS 1
|
||||
#include "../architecture.h"
|
||||
#include "atomic.h"
|
||||
EOF
|
||||
|
||||
gcc -O1 -I. -S $CFILE -o atomic.s
|
||||
@ -146,6 +146,8 @@ typedef struct opal_atomic_lock_t opal_atomic_lock_t;
|
||||
#include "opal/sys/alpha/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_AMD64
|
||||
#include "opal/sys/amd64/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_ARM
|
||||
#include "opal/sys/arm/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_IA32
|
||||
#include "opal/sys/ia32/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_IA64
|
||||
|
||||
@ -79,6 +79,8 @@ BEGIN_C_DECLS
|
||||
/* don't include system-level gorp when generating doxygen files */
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_AMD64
|
||||
#include "opal/sys/amd64/timer.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_ARM
|
||||
#include "opal/sys/arm/timer.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_IA32
|
||||
#include "opal/sys/ia32/timer.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OMPI_IA64
|
||||
|
||||
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