ports/openmpi
ports/openmpi
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Update architecture names in OSHMEM branch

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This commit was SVN r31673.
Этот коммит содержится в:
Ralph Castain 2014-05-07 14:40:49 +00:00
родитель cd1f64b941
Коммит 27faf2684a
6 изменённых файлов: 12 добавлений и 6 удалений
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3
oshmem/shmem/c/shmem_clear_cache_inv.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -25,7 +26,7 @@
void shmem_clear_cache_inv(void) void shmem_clear_cache_inv(void)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_inv is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_inv is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */

3
oshmem/shmem/c/shmem_clear_cache_line_inv.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -25,7 +26,7 @@
void shmem_clear_cache_line_inv(void *target) void shmem_clear_cache_line_inv(void *target)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_line_inv is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_clear_cache_line_inv is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */

3
oshmem/shmem/c/shmem_set_cache_inv.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -25,7 +26,7 @@
void shmem_set_cache_inv(void) void shmem_set_cache_inv(void)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_set_cache_inv is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_set_cache_inv is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */

3
oshmem/shmem/c/shmem_set_cache_line_inv.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -25,7 +26,7 @@
void shmem_set_cache_line_inv(void *target) void shmem_set_cache_line_inv(void *target)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_set_cache_line_inv is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_set_cache_line_inv is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */

3
oshmem/shmem/c/shmem_udcflush.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -24,7 +25,7 @@
void shmem_udcflush(void) void shmem_udcflush(void)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_udcflush is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_udcflush is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */

3
oshmem/shmem/c/shmem_udcflush_line.c
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@ -1,6 +1,7 @@
/* /*
* Copyright (c) 2013 Mellanox Technologies, Inc. * Copyright (c) 2013 Mellanox Technologies, Inc.
* All rights reserved. * All rights reserved.
* Copyright (c) 2014 Intel, Inc. All rights reserved.
* $COPYRIGHT$ * $COPYRIGHT$
* *
* Additional copyrights may follow * Additional copyrights may follow
@ -23,7 +24,7 @@
void shmem_udcflush_line(void *target) void shmem_udcflush_line(void *target)
{ {
#if (OPAL_ASSEMBLY_ARCH == OMPI_IA64) || (OPAL_ASSEMBLY_ARCH == OMPI_IA32) || (OPAL_ASSEMBLY_ARCH == OMPI_AMD64) #if (OPAL_ASSEMBLY_ARCH == OPAL_IA64) || (OPAL_ASSEMBLY_ARCH == OPAL_IA32) || (OPAL_ASSEMBLY_ARCH == OPAL_AMD64)
do {SHMEM_API_VERBOSE(10,"shmem_udcflush_line is not supported by the current CPU architecture");}while (0); do {SHMEM_API_VERBOSE(10,"shmem_udcflush_line is not supported by the current CPU architecture");}while (0);
#else #else
/* another implementation */ /* another implementation */