ports/openmpi
ports/openmpi
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Update the MIPS atomics. We can now compile with gcc and Pathscale.

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This commit was SVN r20154.
Этот коммит содержится в:
George Bosilca 2008-12-18 22:38:31 +00:00
родитель 7fc48ae11e
Коммит 24e191a076
2 изменённых файлов: 27 добавлений и 28 удалений
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12
opal/asm/base/MIPS.asm
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@ -32,7 +32,7 @@ retry1:
bne $3, $5, done1 bne $3, $5, done1
or $2, $6, 0 or $2, $6, 0
sc $2, 0($4) sc $2, 0($4)
bne $2, 1, retry1 beqz $2, retry1
done1: done1:
.set reorder .set reorder
@ -49,7 +49,7 @@ retry2:
bne $3, $5, done2 bne $3, $5, done2
or $2, $6, 0 or $2, $6, 0
sc $2, 0($4) sc $2, 0($4)
bne $2, 1, retry2 beqz $2, retry2
done2: done2:
sync sync
.set reorder .set reorder
@ -68,7 +68,7 @@ retry3:
bne $3, $5, done3 bne $3, $5, done3
or $2, $6, 0 or $2, $6, 0
sc $2, 0($4) sc $2, 0($4)
bne $2, 1, retry3 beqz $2, retry3
done3: done3:
.set reorder .set reorder
@ -85,7 +85,7 @@ retry4:
bne $3, $5, done4 bne $3, $5, done4
or $2, $6, 0 or $2, $6, 0
scd $2, 0($4) scd $2, 0($4)
bne $2, 1, retry4 beqz $2, retry4
done4: done4:
.set reorder .set reorder
@ -102,7 +102,7 @@ retry5:
bne $3, $5, done5 bne $3, $5, done5
or $2, $6, 0 or $2, $6, 0
scd $2, 0($4) scd $2, 0($4)
bne $2, 1, retry5 beqz $2, retry5
done5: done5:
.set reorder .set reorder
sync sync
@ -120,7 +120,7 @@ retry6:
bne $3, $5, done6 bne $3, $5, done6
or $2, $6, 0 or $2, $6, 0
scd $2, 0($4) scd $2, 0($4)
bne $2, 1, retry6 beqz $2, retry6
done6: done6:
.set reorder .set reorder

43
opal/include/opal/sys/mips/atomic.h
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@ -89,21 +89,21 @@ static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
int32_t oldval, int32_t newval) int32_t oldval, int32_t newval)
{ {
int32_t ret; int32_t ret;
int32_t tmp;
__asm__ __volatile__ ("\t" __asm__ __volatile__ (".set noreorder \n"
".set noreorder \n" ".set noat \n"
"1: \n\t" "1: \n"
"ll %0, %2 \n\t" /* load *addr into ret */ "ll %0, %2 \n" /* load *addr into ret */
"bne %0, %3, 2f \n\t" /* done if oldval != ret */ "bne %0, %z3, 2f \n" /* done if oldval != ret */
"or %5, %4, 0 \n\t" /* ret = newval */ "or $1, %z4, 0 \n" /* tmp = newval (delay slot) */
"sc %5, %2 \n\t" /* store ret in *addr */ "sc $1, %2 \n" /* store tmp in *addr */
/* note: ret will be 0 if failed, 1 if succeeded */ /* note: ret will be 0 if failed, 1 if succeeded */
"bne %5, 1, 1b \n\t" "beqz $1, 1b \n" /* if 0 jump back to 1b */
"2: \n\t" "nop \n" /* fill delay slots */
"2: \n"
".set reorder \n" ".set reorder \n"
: "=&r"(ret), "=m"(*addr) : "=&r"(ret), "=m"(*addr)
: "m"(*addr), "r"(oldval), "r"(newval), "r"(tmp) : "m"(*addr), "r"(oldval), "r"(newval)
: "cc", "memory"); : "cc", "memory");
return (ret == oldval); return (ret == oldval);
} }
@ -138,22 +138,21 @@ static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
int64_t oldval, int64_t newval) int64_t oldval, int64_t newval)
{ {
int64_t ret; int64_t ret;
int64_t tmp;
__asm__ __volatile__ ("\t" __asm__ __volatile__ (".set noreorder \n"
".set noreorder \n" ".set noat \n"
"1: \n\t" "1: \n\t"
"lld %0, %2 \n\t" /* load *addr into ret */ "lld %0, %2 \n\t" /* load *addr into ret */
"bne %0, %3, 2f \n\t" /* done if oldval != ret */ "bne %0, %z3, 2f \n\t" /* done if oldval != ret */
"or %5, %4, 0 \n\t" /* tmp = newval */ "or $1, %4, 0 \n\t" /* tmp = newval (delay slot) */
"scd %5, %2 \n\t" /* store tmp in *addr */ "scd $1, %2 \n\t" /* store tmp in *addr */
/* note: ret will be 0 if failed, 1 if succeeded */ /* note: ret will be 0 if failed, 1 if succeeded */
"bne %5, 1, 1b \n" "beqz $1, 1b \n\t" /* if 0 jump back to 1b */
"2: \n\t" "nop \n\t" /* fill delay slot */
"2: \n\t"
".set reorder \n" ".set reorder \n"
: "=&r" (ret), "=m" (*addr) : "=&r" (ret), "=m" (*addr)
: "m" (*addr), "r" (oldval), "r" (newval), : "m" (*addr), "r" (oldval), "r" (newval)
"r"(tmp)
: "cc", "memory"); : "cc", "memory");
return (ret == oldval); return (ret == oldval);