opal/asm: clean up no longer supported architectures
We no longer officially support MIPS or ARM before v6. This commit updates the configury to check for sync builtins on these architectures and removes the MIPS and IA64 assembly from opal/include/opal/sys. Signed-off-by: Nathan Hjelm <hjelmn@lanl.gov>
Этот коммит содержится в:
Nathan Hjelm
Nathan Hjelm
родитель
6dd718afd7
Коммит
1c52d9dffe
@ -957,8 +957,8 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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ia64-*)
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opal_cv_asm_arch="IA64"
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_GCC_INLINE_ASSIGN='"mov %0=r0\n;;\n" : "=&r"(ret)'
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OPAL_CHECK_SYNC_BUILTINS([opal_cv_asm_builtin="BUILTIN_SYNC"],
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[AC_MSG_ERROR([No atomic primitives available for $host])])
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;;
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aarch64*)
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opal_cv_asm_arch="ARM64"
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@ -991,20 +991,16 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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armv5*linux*|armv4*linux*|arm-*-linux-gnueabi)
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# uses Linux kernel helpers for some atomic operations
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opal_cv_asm_arch="ARM"
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OPAL_ASM_SUPPORT_64BIT=0
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OPAL_ASM_ARM_VERSION=5
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CCASFLAGS="$CCASFLAGS -march=armv7-a"
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AC_DEFINE_UNQUOTED([OPAL_ASM_ARM_VERSION], [$OPAL_ASM_ARM_VERSION],
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[What ARM assembly version to use])
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OPAL_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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OPAL_CHECK_SYNC_BUILTINS([opal_cv_asm_builtin="BUILTIN_SYNC"],
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[AC_MSG_ERROR([No atomic primitives available for $host])])
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;;
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mips-*|mips64*)
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# Should really find some way to make sure that we are on
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# a MIPS III machine (r4000 and later)
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opal_cv_asm_arch="MIPS"
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_GCC_INLINE_ASSIGN='"or %0,[$]0,[$]0" : "=&r"(ret)'
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OPAL_CHECK_SYNC_BUILTINS([opal_cv_asm_builtin="BUILTIN_SYNC"],
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[AC_MSG_ERROR([No atomic primitives available for $host])])
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;;
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powerpc-*|powerpc64-*|powerpcle-*|powerpc64le-*|rs6000-*|ppc-*)
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@ -35,8 +35,6 @@ include opal/sys/x86_64/Makefile.am
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include opal/sys/arm/Makefile.am
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include opal/sys/arm64/Makefile.am
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include opal/sys/ia32/Makefile.am
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include opal/sys/ia64/Makefile.am
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include opal/sys/mips/Makefile.am
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include opal/sys/powerpc/Makefile.am
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include opal/sys/sparcv9/Makefile.am
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include opal/sys/sync_builtin/Makefile.am
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@ -1,23 +0,0 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2005 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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#
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# $HEADER$
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#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += \
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opal/sys/ia64/atomic.h \
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opal/sys/ia64/timer.h
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@ -1,145 +0,0 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OPAL_SYS_ARCH_ATOMIC_H
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#define OPAL_SYS_ARCH_ATOMIC_H 1
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/*
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* On ia64, we use cmpxchg, which supports acquire/release semantics natively.
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*/
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#define MB() __asm__ __volatile__("mf": : :"memory")
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/**********************************************************************
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*
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* Define constants for IA64
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*
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*********************************************************************/
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline void opal_atomic_mb(void)
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{
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MB();
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}
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static inline void opal_atomic_rmb(void)
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{
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MB();
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}
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static inline void opal_atomic_wmb(void)
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{
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MB();
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}
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static inline void opal_atomic_isync(void)
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{
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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/**********************************************************************
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*
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* Atomic math operations
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*
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*********************************************************************/
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#if OPAL_GCC_INLINE_ASSEMBLY
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#define ia64_cmpxchg4_acq(ptr, new, old) \
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({ \
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__u64 ia64_intri_res; \
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ia64_intri_res; \
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})
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static inline int opal_atomic_cmpset_acq_32( volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int64_t ret;
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__asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval));
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__asm__ __volatile__ ("cmpxchg4.acq %0=[%1],%2,ar.ccv":
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"=r"(ret) : "r"(addr), "r"(newval) : "memory");
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return ((int32_t)ret == oldval);
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}
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static inline int opal_atomic_cmpset_rel_32( volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int64_t ret;
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__asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval));
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__asm__ __volatile__ ("cmpxchg4.rel %0=[%1],%2,ar.ccv":
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"=r"(ret) : "r"(addr), "r"(newval) : "memory");
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return ((int32_t)ret == oldval);
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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#define opal_atomic_cmpset_32 opal_atomic_cmpset_acq_32
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline int opal_atomic_cmpset_acq_64( volatile int64_t *addr,
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int64_t oldval, int64_t newval)
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{
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int64_t ret;
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__asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval));
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__asm__ __volatile__ ("cmpxchg8.acq %0=[%1],%2,ar.ccv":
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"=r"(ret) : "r"(addr), "r"(newval) : "memory");
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return (ret == oldval);
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}
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static inline int opal_atomic_cmpset_rel_64( volatile int64_t *addr,
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int64_t oldval, int64_t newval)
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{
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int64_t ret;
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__asm__ __volatile__ ("mov ar.ccv=%0;;" :: "rO"(oldval));
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__asm__ __volatile__ ("cmpxchg8.rel %0=[%1],%2,ar.ccv":
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"=r"(ret) : "r"(addr), "r"(newval) : "memory");
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return (ret == oldval);
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}
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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#define opal_atomic_cmpset_64 opal_atomic_cmpset_acq_64
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#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */
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@ -1,48 +0,0 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#ifndef OPAL_SYS_ARCH_TIMER_H
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#define OPAL_SYS_ARCH_TIMER_H 1
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typedef uint64_t opal_timer_t;
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#if OPAL_GCC_INLINE_ASSEMBLY
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static inline opal_timer_t
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opal_sys_timer_get_cycles(void)
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{
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opal_timer_t ret;
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__asm__ __volatile__ ("mov %0=ar.itc" : "=r"(ret));
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return ret;
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}
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#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
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#else
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opal_timer_t opal_sys_timer_get_cycles(void);
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#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
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#endif /* ! OPAL_SYS_ARCH_TIMER_H */
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@ -1,37 +0,0 @@
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#!/bin/sh
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2005 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
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# Copyright (c) 2007 Sun Microsystems, Inc. All rights reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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#
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# $HEADER$
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#
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CFILE=/tmp/opal_atomic_$$.c
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trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
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echo Updating asm.s from atomic.h and timer.h using gcc
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cat > $CFILE<<EOF
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#include <stdlib.h>
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#include <inttypes.h>
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#define static
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#define inline
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#define OPAL_GCC_INLINE_ASSEMBLY 1
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#include "atomic.h"
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#include "timer.h"
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EOF
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gcc -O1 -I. -S $CFILE -o asm.s
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@ -1,24 +0,0 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2008 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
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# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
||||
# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
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||||
#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += \
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opal/sys/mips/atomic.h \
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opal/sys/mips/timer.h
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@ -1,198 +0,0 @@
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
||||
* University Research and Technology
|
||||
* Corporation. All rights reserved.
|
||||
* Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
* of Tennessee Research Foundation. All rights
|
||||
* reserved.
|
||||
* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
* University of Stuttgart. All rights reserved.
|
||||
* Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
||||
* Additional copyrights may follow
|
||||
*
|
||||
* $HEADER$
|
||||
*/
|
||||
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#ifndef OPAL_SYS_ARCH_ATOMIC_H
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#define OPAL_SYS_ARCH_ATOMIC_H 1
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/* BWB - FIX ME! */
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#ifdef __linux__
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#define MB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
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#define RMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
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#define WMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
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#define SMP_SYNC ".set mips2; sync; .set mips0"
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#else
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#define MB() __asm__ __volatile__("sync": : :"memory")
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#define RMB() __asm__ __volatile__("sync": : :"memory")
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#define WMB() __asm__ __volatile__("sync": : :"memory")
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#define SMP_SYNC "sync"
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#endif
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/**********************************************************************
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*
|
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* Define constants for MIPS
|
||||
*
|
||||
*********************************************************************/
|
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
|
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
|
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|
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#ifdef __mips64
|
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
|
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#endif
|
||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* Memory Barriers
|
||||
*
|
||||
*********************************************************************/
|
||||
#if OPAL_GCC_INLINE_ASSEMBLY
|
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|
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static inline
|
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void opal_atomic_mb(void)
|
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{
|
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MB();
|
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}
|
||||
|
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|
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static inline
|
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void opal_atomic_rmb(void)
|
||||
{
|
||||
RMB();
|
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}
|
||||
|
||||
|
||||
static inline
|
||||
void opal_atomic_wmb(void)
|
||||
{
|
||||
WMB();
|
||||
}
|
||||
|
||||
static inline
|
||||
void opal_atomic_isync(void)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/**********************************************************************
|
||||
*
|
||||
* Atomic math operations
|
||||
*
|
||||
*********************************************************************/
|
||||
#if OPAL_GCC_INLINE_ASSEMBLY
|
||||
|
||||
static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
|
||||
int32_t oldval, int32_t newval)
|
||||
{
|
||||
int32_t ret;
|
||||
|
||||
__asm__ __volatile__ (".set noreorder \n"
|
||||
".set noat \n"
|
||||
"1: \n"
|
||||
#ifdef __linux__
|
||||
".set mips2 \n\t"
|
||||
#endif
|
||||
"ll %0, %2 \n" /* load *addr into ret */
|
||||
"bne %0, %z3, 2f \n" /* done if oldval != ret */
|
||||
"or $1, %z4, 0 \n" /* tmp = newval (delay slot) */
|
||||
"sc $1, %2 \n" /* store tmp in *addr */
|
||||
#ifdef __linux__
|
||||
".set mips0 \n\t"
|
||||
#endif
|
||||
/* note: ret will be 0 if failed, 1 if succeeded */
|
||||
"beqz $1, 1b \n" /* if 0 jump back to 1b */
|
||||
"nop \n" /* fill delay slots */
|
||||
"2: \n"
|
||||
".set reorder \n"
|
||||
: "=&r"(ret), "=m"(*addr)
|
||||
: "m"(*addr), "r"(oldval), "r"(newval)
|
||||
: "cc", "memory");
|
||||
return (ret == oldval);
|
||||
}
|
||||
|
||||
|
||||
/* these two functions aren't inlined in the non-gcc case because then
|
||||
there would be two function calls (since neither cmpset_32 nor
|
||||
atomic_?mb can be inlined). Instead, we "inline" them by hand in
|
||||
the assembly, meaning there is one function call overhead instead
|
||||
of two */
|
||||
static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
|
||||
int32_t oldval, int32_t newval)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = opal_atomic_cmpset_32(addr, oldval, newval);
|
||||
opal_atomic_rmb();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
|
||||
int32_t oldval, int32_t newval)
|
||||
{
|
||||
opal_atomic_wmb();
|
||||
return opal_atomic_cmpset_32(addr, oldval, newval);
|
||||
}
|
||||
|
||||
#ifdef OPAL_HAVE_ATOMIC_CMPSET_64
|
||||
static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
int64_t ret;
|
||||
|
||||
__asm__ __volatile__ (".set noreorder \n"
|
||||
".set noat \n"
|
||||
"1: \n\t"
|
||||
"lld %0, %2 \n\t" /* load *addr into ret */
|
||||
"bne %0, %z3, 2f \n\t" /* done if oldval != ret */
|
||||
"or $1, %4, 0 \n\t" /* tmp = newval (delay slot) */
|
||||
"scd $1, %2 \n\t" /* store tmp in *addr */
|
||||
/* note: ret will be 0 if failed, 1 if succeeded */
|
||||
"beqz $1, 1b \n\t" /* if 0 jump back to 1b */
|
||||
"nop \n\t" /* fill delay slot */
|
||||
"2: \n\t"
|
||||
".set reorder \n"
|
||||
: "=&r" (ret), "=m" (*addr)
|
||||
: "m" (*addr), "r" (oldval), "r" (newval)
|
||||
: "cc", "memory");
|
||||
|
||||
return (ret == oldval);
|
||||
}
|
||||
|
||||
|
||||
/* these two functions aren't inlined in the non-gcc case because then
|
||||
there would be two function calls (since neither cmpset_64 nor
|
||||
atomic_?mb can be inlined). Instead, we "inline" them by hand in
|
||||
the assembly, meaning there is one function call overhead instead
|
||||
of two */
|
||||
static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
opal_atomic_rmb();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
||||
static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
|
||||
int64_t oldval, int64_t newval)
|
||||
{
|
||||
opal_atomic_wmb();
|
||||
return opal_atomic_cmpset_64(addr, oldval, newval);
|
||||
}
|
||||
#endif /* OPAL_HAVE_ATOMIC_CMPSET_64 */
|
||||
|
||||
#endif /* OPAL_GCC_INLINE_ASSEMBLY */
|
||||
|
||||
#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */
|
||||
@ -1,33 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2008 The University of Tennessee and The University
|
||||
* of Tennessee Research Foundation. All rights
|
||||
* reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
||||
* Additional copyrights may follow
|
||||
*
|
||||
* $HEADER$
|
||||
*/
|
||||
|
||||
#ifndef OPAL_SYS_ARCH_TIMER_H
|
||||
#define OPAL_SYS_ARCH_TIMER_H 1
|
||||
|
||||
#include <sys/times.h>
|
||||
|
||||
typedef uint64_t opal_timer_t;
|
||||
|
||||
static inline opal_timer_t
|
||||
opal_sys_timer_get_cycles(void)
|
||||
{
|
||||
opal_timer_t ret;
|
||||
struct tms accurate_clock;
|
||||
|
||||
times(&accurate_clock);
|
||||
ret = accurate_clock.tms_utime + accurate_clock.tms_stime;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
|
||||
|
||||
#endif /* ! OPAL_SYS_ARCH_TIMER_H */
|
||||
@ -1,36 +0,0 @@
|
||||
#!/bin/sh
|
||||
#
|
||||
# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
||||
# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
||||
# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
|
||||
#
|
||||
|
||||
CFILE=/tmp/opal_atomic_$$.c
|
||||
|
||||
trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
|
||||
|
||||
echo Updating atomic.s from atomic.h using gcc
|
||||
|
||||
cat > $CFILE<<EOF
|
||||
#include <stdlib.h>
|
||||
#include <inttypes.h>
|
||||
#define static
|
||||
#define inline
|
||||
#define OPAL_GCC_INLINE_ASSEMBLY 1
|
||||
#include "../architecture.h"
|
||||
#include "atomic.h"
|
||||
EOF
|
||||
|
||||
gcc -O1 -I. -S $CFILE -o atomic.s
|
||||
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