Merge pull request #1634 from hjelmn/cma
cma: add support for MIPS and ARM
Этот коммит содержится в:
Nathan Hjelm
GitHub
Коммит
109389dce2
@ -19,19 +19,89 @@
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# check if cma support is wanted.
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AC_DEFUN([OPAL_CHECK_CMA],[
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if test -z "$ompi_check_cma_happy" ; then
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OPAL_VAR_SCOPE_PUSH([ompi_check_cma_need_defs ompi_check_cma_kernel_version])
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OPAL_VAR_SCOPE_PUSH([ompi_check_cma_need_defs ompi_check_cma_kernel_version ompi_check_cma_CFLAGS])
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ompi_check_cma_happy="no"
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AC_ARG_WITH([cma],
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[AC_HELP_STRING([--with-cma],
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[Build Cross Memory Attach support (default: no)])])
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[Build Cross Memory Attach support (default: autodetect)])])
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# Enable CMA support by default if process_vm_readv is defined in glibc
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AC_CHECK_FUNC(process_vm_readv, [ompi_check_cma_need_defs=0],
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[ompi_check_cma_need_defs=1])
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if test $ompi_check_cma_need_defs = 1 ; then
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ompi_check_cma_CFLAGS="$CFLAGS"
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# Need some extra include paths to locate the appropriate headers
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CFLAGS="$CFLAGS -I${srcdir} -I${srcdir}/opal/include"
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AC_MSG_CHECKING([if internal syscall numbers for Linux CMA work])
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AC_RUN_IFELSE([AC_LANG_PROGRAM([[
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/uio.h>
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#include <sys/wait.h>
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#include <sys/syscall.h>
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#include "opal/include/opal/sys/cma.h"
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static void do_check (pid_t pid, int *in, int *out)
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{
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int check[4] = {0, 0, 0, 0}, i;
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struct iovec rem_iov = {out, sizeof (check)};
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struct iovec loc_iov = {check, sizeof (check)};
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ssize_t rc;
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rc = process_vm_readv (pid, &loc_iov, 1, &rem_iov, 1, 0);
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if (sizeof (check) != rc) {
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exit (1);
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}
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for (i = 0 ; i < 4 ; ++i) {
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if (check[i] != i) {
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exit (1);
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}
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check[i] = i * 2;
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}
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rem_iov.iov_base = in;
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rc = process_vm_writev (pid, &loc_iov, 1, &rem_iov, 1, 0);
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if (sizeof (check) != rc) {
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exit (1);
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}
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exit (0);
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}
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]],[[
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int i, in[4] = {-1, -1, -1, -1}, out[4] = {0, 1, 2, 3};
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do_check (getpid (), in, out);
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for (i = 0 ; i < 4 ; ++i) {
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if (in[i] != 2 * i) {
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return 1;
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}
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}
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/* all good */
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return 0;
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]])],
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[AC_MSG_RESULT([yes])
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ompi_check_cma_happy="yes"],
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[AC_MSG_RESULT([no])
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ompi_check_cma_happy="no"],
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[AC_MSG_RESULT([no (cross-compiling)])
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ompi_check_cma_happy="no"])
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CFLAGS="$ompi_check_cma_CFLAGS"
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else
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ompi_check_cma_happy="yes"
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fi
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# If the user specifically requests CMA go ahead and enable it even
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# if the glibc version does not support process_vm_readv
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if test $ompi_check_cma_need_defs = 0 || test "x$with_cma" = "xyes" ; then
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if test "x$with_cma" = "xyes" || test "$ompi_check_cma_happy" = "yes" ; then
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ompi_check_cma_happy="yes"
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AC_DEFINE_UNQUOTED([OPAL_CMA_NEED_SYSCALL_DEFS],
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[$ompi_check_cma_need_defs],
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@ -1025,6 +1025,14 @@ AC_DEFUN([OPAL_CONFIG_ASM],[
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_GCC_INLINE_ASSIGN='"mov %0=r0\n;;\n" : "=&r"(ret)'
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;;
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aarch64*)
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opal_cv_asm_arch="ARM64"
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OPAL_ASM_SUPPORT_64BIT=1
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OPAL_ASM_ARM_VERSION=8
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AC_DEFINE_UNQUOTED([OPAL_ASM_ARM_VERSION], [$OPAL_ASM_ARM_VERSION],
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[What ARM assembly version to use])
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OPAL_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
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;;
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armv7*)
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opal_cv_asm_arch="ARM"
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@ -11,6 +11,8 @@
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# All rights reserved.
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# Copyright (c) 2010 Cisco Systems, Inc. All rights reserved.
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# Copyright (c) 2011 Sandia National Laboratories. All rights reserved.
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# Copyright (c) 2016 Los Alamos National Security, LLC. All rights
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# reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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@ -29,6 +31,7 @@ headers += \
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include opal/sys/amd64/Makefile.am
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include opal/sys/arm/Makefile.am
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include opal/sys/arm64/Makefile.am
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include opal/sys/ia32/Makefile.am
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include opal/sys/ia64/Makefile.am
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include opal/sys/mips/Makefile.am
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@ -11,6 +11,8 @@
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* All rights reserved.
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* Copyright (c) 2011 Sandia National Laboratories. All rights reserved.
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* Copyright (c) 2014 Intel, Inc. All rights reserved
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* Copyright (c) 2016 Los Alamos National Security, LLC. All rights
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* reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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@ -37,6 +39,7 @@
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#define OPAL_SPARCV9_64 0062
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#define OPAL_MIPS 0070
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#define OPAL_ARM 0100
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#define OPAL_ARM64 0101
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#define OPAL_BUILTIN_SYNC 0200
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#define OPAL_BUILTIN_OSX 0201
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#define OPAL_BUILTIN_GCC 0202
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24
opal/include/opal/sys/arm64/Makefile.am
Обычный файл
24
opal/include/opal/sys/arm64/Makefile.am
Обычный файл
@ -0,0 +1,24 @@
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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# University Research and Technology
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# Corporation. All rights reserved.
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# Copyright (c) 2004-2008 The University of Tennessee and The University
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# of Tennessee Research Foundation. All rights
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# reserved.
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# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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# University of Stuttgart. All rights reserved.
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# Copyright (c) 2004-2005 The Regents of the University of California.
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# All rights reserved.
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# $COPYRIGHT$
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#
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# Additional copyrights may follow
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#
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# $HEADER$
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#
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# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am
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headers += \
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opal/sys/arm64/atomic.h \
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opal/sys/arm64/timer.h
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270
opal/include/opal/sys/arm64/atomic.h
Обычный файл
270
opal/include/opal/sys/arm64/atomic.h
Обычный файл
@ -0,0 +1,270 @@
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/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2005 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2010 IBM Corporation. All rights reserved.
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* Copyright (c) 2010 ARM ltd. All rights reserved.
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* Copyright (c) 2016 Los Alamos National Security, LLC. All rights
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* reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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#if !defined(OPAL_SYS_ARCH_ATOMIC_H)
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#define OPAL_SYS_ARCH_ATOMIC_H 1
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#if OPAL_GCC_INLINE_ASSEMBLY
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#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
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#define OPAL_HAVE_ATOMIC_LLSC_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_32 1
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#define OPAL_HAVE_ATOMIC_MATH_32 1
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#define OPAL_HAVE_ATOMIC_CMPSET_64 1
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#define OPAL_HAVE_ATOMIC_LLSC_64 1
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#define OPAL_HAVE_ATOMIC_ADD_32 1
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#define OPAL_HAVE_ATOMIC_SUB_32 1
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#define OPAL_HAVE_ATOMIC_ADD_64 1
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#define OPAL_HAVE_ATOMIC_SUB_64 1
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#define MB() __asm__ __volatile__ ("dmb sy" : : : "memory")
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#define RMB() __asm__ __volatile__ ("dmb ld" : : : "memory")
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#define WMB() __asm__ __volatile__ ("dmb st" : : : "memory")
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/**********************************************************************
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*
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* Memory Barriers
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*
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*********************************************************************/
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static inline void opal_atomic_mb (void)
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{
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MB();
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}
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static inline void opal_atomic_rmb (void)
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{
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RMB();
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}
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static inline void opal_atomic_wmb (void)
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{
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WMB();
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}
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static inline void opal_atomic_isync (void)
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{
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__asm__ __volatile__ ("isb");
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}
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/**********************************************************************
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*
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* Atomic math operations
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*
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*********************************************************************/
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static inline int opal_atomic_cmpset_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int32_t ret, tmp;
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__asm__ __volatile__ ("1: ldaxr %w0, [%2] \n"
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" cmp %w0, %w3 \n"
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" bne 2f \n"
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" stxr %w1, %w4, [%2] \n"
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" cbnz %w1, 1b \n"
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"2: \n"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (addr), "r" (oldval), "r" (newval)
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: "cc", "memory");
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return (ret == oldval);
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}
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/* these two functions aren't inlined in the non-gcc case because then
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there would be two function calls (since neither cmpset_32 nor
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atomic_?mb can be inlined). Instead, we "inline" them by hand in
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the assembly, meaning there is one function call overhead instead
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of two */
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static inline int opal_atomic_cmpset_acq_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int32_t ret, tmp;
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__asm__ __volatile__ ("1: ldaxr %w0, [%2] \n"
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" cmp %w0, %w3 \n"
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" bne 2f \n"
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" stxr %w1, %w4, [%2] \n"
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" cbnz %w1, 1b \n"
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"2: \n"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (addr), "r" (oldval), "r" (newval)
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: "cc", "memory");
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return (ret == oldval);
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}
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static inline int opal_atomic_cmpset_rel_32(volatile int32_t *addr,
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int32_t oldval, int32_t newval)
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{
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int32_t ret, tmp;
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__asm__ __volatile__ ("1: ldxr %w0, [%2] \n"
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" cmp %w0, %w3 \n"
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" bne 2f \n"
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" stlxr %w1, %w4, [%2] \n"
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" cbnz %w1, 1b \n"
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"2: \n"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (addr), "r" (oldval), "r" (newval)
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: "cc", "memory");
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return (ret == oldval);
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}
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static inline int32_t opal_atomic_ll_32 (volatile int32_t *addr)
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{
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int32_t ret;
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__asm__ __volatile__ ("ldaxr %w0, [%1] \n"
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: "=&r" (ret)
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: "r" (addr));
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return ret;
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}
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static inline int opal_atomic_sc_32 (volatile int32_t *addr, int32_t newval)
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{
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int ret;
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__asm__ __volatile__ ("stlxr %w0, %w2, [%1] \n"
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: "=&r" (ret)
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: "r" (addr), "r" (newval)
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: "cc", "memory");
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return ret == 0;
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}
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static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
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int64_t oldval, int64_t newval)
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{
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int64_t ret;
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int tmp;
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__asm__ __volatile__ ("1: ldaxr %0, [%2] \n"
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" cmp %0, %3 \n"
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" bne 2f \n"
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" stxr %w1, %4, [%2] \n"
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" cbnz %w1, 1b \n"
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"2: \n"
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: "=&r" (ret), "=&r" (tmp)
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: "r" (addr), "r" (oldval), "r" (newval)
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: "cc", "memory");
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return (ret == oldval);
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}
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/* these two functions aren't inlined in the non-gcc case because then
|
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there would be two function calls (since neither cmpset_64 nor
|
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atomic_?mb can be inlined). Instead, we "inline" them by hand in
|
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the assembly, meaning there is one function call overhead instead
|
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of two */
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static inline int opal_atomic_cmpset_acq_64(volatile int64_t *addr,
|
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int64_t oldval, int64_t newval)
|
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{
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int64_t ret;
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int tmp;
|
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|
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__asm__ __volatile__ ("1: ldaxr %0, [%2] \n"
|
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" cmp %0, %3 \n"
|
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" bne 2f \n"
|
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" stxr %w1, %4, [%2] \n"
|
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" cbnz %w1, 1b \n"
|
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"2: \n"
|
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: "=&r" (ret), "=&r" (tmp)
|
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: "r" (addr), "r" (oldval), "r" (newval)
|
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: "cc", "memory");
|
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|
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return (ret == oldval);
|
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}
|
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|
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|
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static inline int opal_atomic_cmpset_rel_64(volatile int64_t *addr,
|
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int64_t oldval, int64_t newval)
|
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{
|
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int64_t ret;
|
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int tmp;
|
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|
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__asm__ __volatile__ ("1: ldxr %0, [%2] \n"
|
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" cmp %0, %3 \n"
|
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" bne 2f \n"
|
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" stlxr %w1, %4, [%2] \n"
|
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" cbnz %w1, 1b \n"
|
||||
"2: \n"
|
||||
: "=&r" (ret), "=&r" (tmp)
|
||||
: "r" (addr), "r" (oldval), "r" (newval)
|
||||
: "cc", "memory");
|
||||
|
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return (ret == oldval);
|
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}
|
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|
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static inline int64_t opal_atomic_ll_64 (volatile int64_t *addr)
|
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{
|
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int64_t ret;
|
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|
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__asm__ __volatile__ ("ldaxr %0, [%1] \n"
|
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: "=&r" (ret)
|
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: "r" (addr));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int opal_atomic_sc_64 (volatile int64_t *addr, int64_t newval)
|
||||
{
|
||||
int ret;
|
||||
|
||||
__asm__ __volatile__ ("stlxr %w0, %2, [%1] \n"
|
||||
: "=&r" (ret)
|
||||
: "r" (addr), "r" (newval)
|
||||
: "cc", "memory");
|
||||
|
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return ret == 0;
|
||||
}
|
||||
|
||||
#define OPAL_ASM_MAKE_ATOMIC(type, bits, name, inst, reg) \
|
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static inline type opal_atomic_ ## name ## _ ## bits (volatile type *addr, type value) \
|
||||
{ \
|
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type newval; \
|
||||
int32_t tmp; \
|
||||
\
|
||||
__asm__ __volatile__("1: ldxr %" reg "0, [%2] \n" \
|
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" " inst " %" reg "0, %" reg "0, %" reg "3 \n" \
|
||||
" stxr %w1, %" reg "0, [%2] \n" \
|
||||
" cbnz %w1, 1b \n" \
|
||||
: "=&r" (newval), "=&r" (tmp) \
|
||||
: "r" (addr), "r" (value) \
|
||||
: "cc", "memory"); \
|
||||
\
|
||||
return newval; \
|
||||
}
|
||||
|
||||
OPAL_ASM_MAKE_ATOMIC(int32_t, 32, add, "add", "w")
|
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OPAL_ASM_MAKE_ATOMIC(int32_t, 32, sub, "sub", "w")
|
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OPAL_ASM_MAKE_ATOMIC(int64_t, 64, add, "add", "")
|
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OPAL_ASM_MAKE_ATOMIC(int64_t, 64, sub, "sub", "")
|
||||
|
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#endif /* OPAL_GCC_INLINE_ASSEMBLY */
|
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|
||||
#endif /* ! OPAL_SYS_ARCH_ATOMIC_H */
|
||||
33
opal/include/opal/sys/arm64/timer.h
Обычный файл
33
opal/include/opal/sys/arm64/timer.h
Обычный файл
@ -0,0 +1,33 @@
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/*
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* Copyright (c) 2008 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
|
||||
* reserved.
|
||||
* $COPYRIGHT$
|
||||
*
|
||||
* Additional copyrights may follow
|
||||
*
|
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* $HEADER$
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||||
*/
|
||||
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#ifndef OPAL_SYS_ARCH_TIMER_H
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#define OPAL_SYS_ARCH_TIMER_H 1
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#include <sys/times.h>
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typedef uint64_t opal_timer_t;
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static inline opal_timer_t
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opal_sys_timer_get_cycles(void)
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{
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opal_timer_t ret;
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struct tms accurate_clock;
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times(&accurate_clock);
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ret = accurate_clock.tms_utime + accurate_clock.tms_stime;
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return ret;
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}
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#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1
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#endif /* ! OPAL_SYS_ARCH_TIMER_H */
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36
opal/include/opal/sys/arm64/update.sh
Обычный файл
36
opal/include/opal/sys/arm64/update.sh
Обычный файл
@ -0,0 +1,36 @@
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#!/bin/sh
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#
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# Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
|
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# University Research and Technology
|
||||
# Corporation. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The University of Tennessee and The University
|
||||
# of Tennessee Research Foundation. All rights
|
||||
# reserved.
|
||||
# Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
|
||||
# University of Stuttgart. All rights reserved.
|
||||
# Copyright (c) 2004-2005 The Regents of the University of California.
|
||||
# All rights reserved.
|
||||
# $COPYRIGHT$
|
||||
#
|
||||
# Additional copyrights may follow
|
||||
#
|
||||
# $HEADER$
|
||||
#
|
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|
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CFILE=/tmp/opal_atomic_$$.c
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trap "/bin/rm -f $CFILE; exit 0" 0 1 2 15
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echo Updating atomic.s from atomic.h using gcc
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cat > $CFILE<<EOF
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#include <stdlib.h>
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#include <inttypes.h>
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#define static
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#define inline
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#define OPAL_GCC_INLINE_ASSEMBLY 1
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#include "../architecture.h"
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#include "atomic.h"
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EOF
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gcc -O1 -I. -S $CFILE -o atomic.s
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@ -157,6 +157,8 @@ enum {
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#include "opal/sys/amd64/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM
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#include "opal/sys/arm/atomic.h"
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM64
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#include "opal/sys/arm64/atomic.h"
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#elif OPAL_ASSEMBLY_ARCH == OPAL_IA32
|
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#include "opal/sys/ia32/atomic.h"
|
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#elif OPAL_ASSEMBLY_ARCH == OPAL_IA64
|
||||
|
||||
@ -1,5 +1,7 @@
|
||||
/*
|
||||
* Copyright (c) 2011-2012 IBM Corporation. All rights reserved.
|
||||
* Copyright (c) 2016 Los Alamos National Security, LLC. All rights
|
||||
* reserved.
|
||||
*
|
||||
*/
|
||||
|
||||
@ -14,7 +16,10 @@
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||||
#ifndef OPAL_SYS_CMA_H
|
||||
#define OPAL_SYS_CMA_H 1
|
||||
|
||||
#if !defined(OPAL_ASSEMBLY_ARCH)
|
||||
/* need opal_config.h for the assembly architecture */
|
||||
#include "opal_config.h"
|
||||
#endif
|
||||
|
||||
#include "opal/sys/architecture.h"
|
||||
|
||||
@ -45,6 +50,36 @@
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_POWERPC64
|
||||
#define __NR_process_vm_readv 351
|
||||
#define __NR_process_vm_writev 352
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM
|
||||
|
||||
#define __NR_process_vm_readv 376
|
||||
#define __NR_process_vm_writev 377
|
||||
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_ARM64
|
||||
|
||||
/* ARM64 uses the asm-generic syscall numbers */
|
||||
|
||||
#define __NR_process_vm_readv 270
|
||||
#define __NR_process_vm_writev 271
|
||||
|
||||
#elif OPAL_ASSEMBLY_ARCH == OPAL_MIPS
|
||||
|
||||
#if _MIPS_SIM == _MIPS_SIM_ABI64
|
||||
|
||||
#define __NR_process_vm_readv 5304
|
||||
#define __NR_process_vm_writev 5305
|
||||
|
||||
#elif _MIPS_SIM == _MIPS_SIM_NABI32
|
||||
|
||||
#define __NR_process_vm_readv 6309
|
||||
#define __NR_process_vm_writev 6310
|
||||
|
||||
#else
|
||||
|
||||
#error "Unsupported MIPS architecture for process_vm_readv and process_vm_writev syscalls"
|
||||
|
||||
#endif
|
||||
|
||||
#else
|
||||
#error "Unsupported architecture for process_vm_readv and process_vm_writev syscalls"
|
||||
#endif
|
||||
|
||||
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