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openmpi/opal/asm/base/POWERPC32.asm

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* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
START_FILE
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
TEXT
ALIGN(4)
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_mb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
sync
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_mb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_rmb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
lwsync
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_rmb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_wmb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
eieio
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_wmb)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_32)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(1) lwarx r0, 0, r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
cmpw 0, r0, r4
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(2)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
stwcx. r5, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(1)
LSYM(2)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
xor r3,r0,r4
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_32)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_acq_32)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(3) lwarx r0, 0, r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
cmpw 0, r0, r4
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(4)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
stwcx. r5, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(3)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
sync
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(4)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
xor r3,r0,r4
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
lwsync
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_acq_32)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_rel_32)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
eieio
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(5) lwarx r0, 0, r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
cmpw 0, r0, r4
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(6)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
stwcx. r5, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(5)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
sync
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(6)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
xor r3,r0,r4
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_rel_32)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
#START_64BIT
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_64)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(7) ldarx r9, 0, r3
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
cmpd 0, r9, r5
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(8)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stdcx. r7, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(7)
LSYM(8)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
xor r3,r5,r9
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_64)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_acq_64)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(9) ldarx r9, 0, r3
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
cmpd 0, r9, r5
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(10)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stdcx. r7, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(9)
LSYM(10)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
xor r3,r5,r9
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
blr
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
lwsync
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_acq_64)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_cmpset_rel_64)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stw r4,-32(r1)
stw r5,-28(r1)
stw r6,-24(r1)
stw r7,-20(r1)
ld r5,-32(r1)
ld r7,-24(r1)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
eieio
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(11) ldarx r9, 0, r3
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
cmpd 0, r9, r5
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(12)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
stdcx. r7, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(11)
LSYM(12)
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
xor r3,r5,r9
On AIX the r2 is a protected register (stack/frame pointer). If we use it inside our functions we destroy the frame pointer for the next call so very very weird things happened. Like seg fault on i = 50 !!! Both 32 and 64 bits versions have been modified but only the 32 version have been tested (by lack of ressources). This commit was SVN r5525. The following SVN revision numbers were found above: r2 --> open-mpi/ompi@58fdc188553052bc2e893ba28fb28fddbe78435a
2005-04-29 01:57:31 +04:00
subfic r5,r3,0
adde r3,r5,r3
* Fix bug 1127. Update powerpc 32 code to do 64bit compare and set when running on hardware with such support. Since the calling convention is to use the registers as 32 bit values (even if they are 64 bit registers), we need to pack things up properly before doing the compare and set. This commit was SVN r4226.
2005-01-29 02:32:44 +03:00
blr
lwsync
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_cmpset_rel_64)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
#END_64BIT
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_add_32)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(13) lwarx r0, 0, r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
add r0, r4, r0
stwcx. r0, 0, r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(13)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
lwz r3,0(r3)
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_add_32)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
START_FUNC(opal_atomic_sub_32)
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
LSYM(14) lwarx r0,0,r3
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
subf r0,r4,r0
stwcx. r0,0,r3
* Updates to make non-inline assembly behave properly on AIX. This commit was SVN r4364.
2005-02-10 03:06:54 +03:00
bne- REFLSYM(14)
* Update build system to support non-GCC inline assembly, including detection of assembler format * Fix minor bugs in AMD64, PPC, and IA32 assembly for atomic operations * Clean up the #defines to look for when examining level of atomic operation support This commit was SVN r4183.
2005-01-27 04:39:55 +03:00
lwz r3,0(r3)
blr
* rename all the atomic functions from ompi to opal This commit was SVN r6325.
2005-07-04 01:38:51 +04:00
END_FUNC(opal_atomic_sub_32)
* support high-res timers even if we don't have inline assembly This commit was SVN r6987.
2005-08-24 01:50:23 +04:00
START_FUNC(opal_sys_timer_get_cycles)
LSYM(15)
mftbu r0
mftb r11
mftbu r2
cmpw cr7,r2,r0
bne+ cr7,REFLSYM(14)
li r4,0
li r9,0
or r3,r2,r9
or r4,r4,r11
blr
END_FUNC(opal_sys_timer_get_cycles)
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