124 строки
4.3 KiB
C
124 строки
4.3 KiB
C
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/*
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* Copyright (c) 2004-2005 The Trustees of Indiana University and Indiana
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* University Research and Technology
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* Corporation. All rights reserved.
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* Copyright (c) 2004-2014 The University of Tennessee and The University
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* of Tennessee Research Foundation. All rights
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* reserved.
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* Copyright (c) 2004-2005 High Performance Computing Center Stuttgart,
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* University of Stuttgart. All rights reserved.
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* Copyright (c) 2004-2005 The Regents of the University of California.
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* All rights reserved.
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* Copyright (c) 2015 Cisco Systems, Inc. All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
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*
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* $HEADER$
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*/
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/** @file */
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#include "ompi_config.h"
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#include "ompi/constants.h"
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#include "ompi/communicator/communicator.h"
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#include "ompi/mca/coll/coll.h"
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#include "opal/sys/atomic.h"
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#include "coll_sm.h"
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/**
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* Shared memory barrier.
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*
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* Tree-based algorithm for a barrier: a fan in to rank 0 followed by
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* a fan out using the barrier segments in the shared memory area.
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*
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* There are 2 sets of barrier buffers -- since there can only be, at
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* most, 2 outstanding barriers at any time, there is no need for more
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* than this. The generalized in-use flags, control, and data
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* segments are not used.
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*
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* The general algorithm is for a given process to wait for its N
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* children to fan in by monitoring a uint32_t in its barrier "in"
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* buffer. When this value reaches N (i.e., each of the children have
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* atomically incremented the value), then the process atomically
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* increases the uint32_t in its parent's "in" buffer. Then the
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* process waits for the parent to set a "1" in the process' "out"
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* buffer. Once this happens, the process writes a "1" in each of its
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* children's "out" buffers, and returns.
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*
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* There's corner cases, of course, such as the root that has no
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* parent, and the leaves that have no children. But that's the
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* general idea.
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*/
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int mca_coll_sm_barrier_intra(struct ompi_communicator_t *comm,
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mca_coll_base_module_t *module)
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{
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int rank, buffer_set;
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mca_coll_sm_comm_t *data;
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uint32_t i, num_children;
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volatile uint32_t *me_in, *me_out, *parent, *children = NULL;
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int uint_control_size;
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mca_coll_sm_module_t *sm_module = (mca_coll_sm_module_t*) module;
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/* Lazily enable the module the first time we invoke a collective
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on it */
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if (!sm_module->enabled) {
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int ret;
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if (OMPI_SUCCESS != (ret = ompi_coll_sm_lazy_enable(module, comm))) {
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return ret;
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}
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}
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uint_control_size =
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mca_coll_sm_component.sm_control_size / sizeof(uint32_t);
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data = sm_module->sm_comm_data;
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rank = ompi_comm_rank(comm);
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num_children = data->mcb_tree[rank].mcstn_num_children;
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buffer_set = ((data->mcb_barrier_count++) % 2) * 2;
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me_in = &data->mcb_barrier_control_me[buffer_set];
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me_out = (uint32_t*)
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(((char*) me_in) + mca_coll_sm_component.sm_control_size);
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/* Wait for my children to write to my *in* buffer */
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if (0 != num_children) {
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/* Get children *out* buffer */
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children = data->mcb_barrier_control_children + buffer_set +
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uint_control_size;
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SPIN_CONDITION(*me_in == num_children, exit_label1);
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*me_in = 0;
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}
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/* Send to my parent and wait for a response (don't poll on
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parent's out buffer -- that would cause a lot of network
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traffic / contention / faults / etc. Instead, children poll on
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local memory and therefore only num_children messages are sent
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across the network [vs. num_children *each* time all the
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children poll] -- i.e., the memory is only being polled by one
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process, and it is only changed *once* by an external
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process) */
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if (0 != rank) {
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/* Get parent *in* buffer */
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parent = &data->mcb_barrier_control_parent[buffer_set];
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(void)opal_atomic_add(parent, 1);
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SPIN_CONDITION(0 != *me_out, exit_label2);
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*me_out = 0;
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}
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/* Send to my children */
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for (i = 0; i < num_children; ++i) {
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children[i * uint_control_size * 4] = 1;
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}
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/* All done! End state of the control segment:
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me_in: 0
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me_out: 0
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*/
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return OMPI_SUCCESS;
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}
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