vhdl.syntax: cleanup trailing spaces

Signed-off-by: Sergei Trofimovich <slyfox@inbox.ru>

syntax/vhdl.syntax

@@ -116,7 +116,6 @@ context default
 	keyword whole alias	brightcyan
 	keyword whole attribute	brightcyan
 
-
 	keyword whole in	white
 	keyword whole out	white
 	keyword whole inout	white
@@ -144,7 +143,5 @@ context default
 	keyword whole error	red
 	keyword whole failure	red
 
-
 context exclusive -- \n	brown
 context " "	green/green
-