96 строки
3.0 KiB
C
Исполняемый файл
96 строки
3.0 KiB
C
Исполняемый файл
/*
|
|
* (c) 2024, SWD Embedded Systems Limited, http://www.kpda.ru
|
|
*/
|
|
|
|
#ifndef _SUNXI_H_INCLUDED
|
|
#define _SUNXI_H_INCLUDED
|
|
|
|
#include <assert.h>
|
|
#include <stdio.h>
|
|
#include <stdlib.h>
|
|
#include <stdint.h>
|
|
#include <errno.h>
|
|
#include <unistd.h>
|
|
#include <string.h>
|
|
#include <sys/mman.h>
|
|
#include <sys/neutrino.h>
|
|
#include <hw/inout.h>
|
|
#include <hw/platform-control.h>
|
|
|
|
#include <hw/sunxi-platform.h>
|
|
|
|
/*
|
|
* SUNXI CCU
|
|
*/
|
|
#define SUNXI_CCU_BASE 0x01C20000
|
|
#define SUNXI_CCU_SIZE 0x400
|
|
|
|
/*
|
|
* SUNXI SYSTEM CONTROL REG
|
|
* Used to determine the SoC id
|
|
*/
|
|
#define SUNXI_SYS_CTL_VER_REG 0x24
|
|
#define SUNXI_SYS_CTL_VER_SIZE 0x4
|
|
#define SUNXI_SYS_CTL_BASE 0x01C00000
|
|
|
|
#define SUNXI_MASK_DIV(x) (x - 1)
|
|
|
|
#define SUNXI_PLL_CTRL_OFFSET(id) (0x000 + (0x04 * id)) // id=0 to PLL_CLK_MAX
|
|
#define SUNXI_BUS_CLK_GATING_OFFSET(id) (0x060 + (0x04 * id)) // id=0 to 4
|
|
#define SUNXI_CCU_CLK_OFFSET(id) (0x074 + (0x04 * id)) // id=0 to CCU_CLK_MAX
|
|
#define SUNXI_BUS_SFT_RST_OFFSET(id) (0x2C0 + (0x04 * id + (id >= 3 ? (id == 3 ? 0x4 : 0x8) : 0))) // id=0 to 4
|
|
|
|
/*
|
|
* Identification of the SUNXI SoC family
|
|
*/
|
|
enum sunxi_soc_id {
|
|
sun8iw1 = 0x1633,
|
|
sun8iw2 = 0x1651,
|
|
sun8iw3 = 0x1650,
|
|
sun8iw5 = 0x1667,
|
|
sun8iw6 = 0x1673,
|
|
sun8iw7 = 0x1680,
|
|
sun8iw8 = 0x1681,
|
|
sun8iw10 = 0x1699,
|
|
sun8iw11 = 0x1701,
|
|
sun8iw12 = 0x1721,
|
|
sun8iw15 = 0x1755,
|
|
sun8iw16 = 0x1816,
|
|
sun8iw17 = 0x1708,
|
|
};
|
|
|
|
typedef struct {
|
|
int (*convert_clk_index)(enum sunxi_clk_index id, int *clock_shift);
|
|
int (*convert_pll_index)(enum sunxi_pll_clocks id, int *pll_shift);
|
|
int (*check_clk_parent_index)(enum sunxi_clk_parent id);
|
|
uint8_t (*get_struct_bus_gat)(enum sunxi_clk_index id, uint8_t *num_bus);
|
|
uint8_t (*get_struct_bus_rst)(enum sunxi_clk_index id, uint8_t *num_bus);
|
|
int (*covert_clk_parent_to_pll_ctrl)(enum sunxi_clk_parent id, enum sunxi_pll_clocks *pll_id);
|
|
} plat_func_t;
|
|
|
|
typedef struct {
|
|
PLAT_CTRL plat; /* has to be the first element */
|
|
uintptr_t ccu_base;
|
|
uintptr_t sys_base;
|
|
|
|
char soc_version[8];
|
|
|
|
plat_func_t func;
|
|
} sunxi_plat_t;
|
|
|
|
extern void* sunxi_init(void *hdl, char *options);
|
|
extern void sunxi_fini(void *hdl);
|
|
extern int sunxi_drvinfo(void *hdl, plat_ctrl_drvinfo_t *info);
|
|
extern int sunxi_set_clk(void *hdl, plat_ctrl_clk_cfg_t *cfg);
|
|
extern int sunxi_get_clk(void *hdl, plat_ctrl_clk_cfg_t *cfg);
|
|
extern int sunxi_set_reset(void *hdl, plat_ctrl_reset_cfg_t *cfg);
|
|
|
|
void regmap_update_bits(uintptr_t addr, uint32_t offset, uint32_t mask, uint32_t value);
|
|
|
|
int check_valid_id_clk(plat_func_t func, enum sunxi_clk_index cfg_id, int *shift);
|
|
int check_valid_id_rst(plat_func_t func, enum sunxi_clk_index cfg_id);
|
|
int check_valid_id_pll(plat_func_t func, enum sunxi_pll_clocks cfg_id, int *shift);
|
|
int check_valid_id_clock_parent(plat_func_t func, enum sunxi_clk_parent cfg_id);
|
|
|
|
#endif /* _SUNXI_H_INCLUDED */
|